Lines Matching defs:FP
279 // SSE has no i16 to fp conversion, only i32
601 // Set up the FP register classes.
629 // Expand FP immediates into loads from the stack, except for the special
635 // Set up the FP register classes.
656 // Special cases we handle for FP constants.
670 // Set up the FP register classes.
1632 // If this is x86-64, and we disabled SSE, we can't return FP values,
1647 // the RET instruction and handled by the FP Stackifier.
1651 // change the value to the FP stack register class.
1779 // If this is x86-64, and we disabled SSE, we can't return FP values
1787 // If this is a call to a function that returns an fp value on the floating
1794 // use a truncate to move it from fp stack reg to xmm reg.
2167 // Now store the XMM (fp + vector) parameter registers.
2342 // Lower arguments at fp - stackoffset + fpdiff.
3278 /// code. Current x86 isa includes the following FP cmov instructions:
3297 /// specified FP immediate natively. If false, the legalizer will
3298 /// materialize the FP immediate as a load from a constant pool.
4418 // floating-point, no support for integer ops. Emit fp zeroed vectors.
8116 // FP constant to bias correct the final result.
8288 // We lower FP->int64 either into FISTP64 followed by a load from a temporary
9312 // Handle all other FP comparisons here.
11216 // Save FP Control Word to stack slot
11229 // Load FP Control Word from stack slot
14381 // Since FP is only updated here but NOT referenced, it's treated as GPR.
14382 unsigned FP = (PVT == MVT::i64) ? X86::RBP : X86::EBP;
14393 // Reload FP
14394 MIB = BuildMI(*MBB, MI, DL, TII->get(PtrLoadOpc), FP);
16044 // where both setccs reference the same FP CMP, and rewrite for CMPEQSS
16838 // the FP state in cases where an emms may be missing.
17432 // a 32-bit target where SSE doesn't support i64->FP operations.
18001 // FP X constraints get lowered to SSE1/2 registers if available, otherwise
18200 case 'f': // FP Stack registers.
