Cross Reference: /external/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp

Lines Matching refs:lshr

609       APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
629   case Instruction::LShr:
646       KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
647       KnownOne  = APIntOps::lshr(KnownOne, ShiftAmt);
693       KnownZero = APIntOps::lshr(KnownZero, ShiftAmt);
694       KnownOne  = APIntOps::lshr(KnownOne, ShiftAmt);
699       SignBit = APIntOps::lshr(SignBit, ShiftAmt);
864   bool isLshr = (Shr->getOpcode() == Instruction::LShr);
865   BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) :
871     BitMask2 = isLshr ? BitMask2.lshr(ShrAmt - ShlAmt):

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