Lines Matching refs:XMM_L
3233 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3235 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)));
3236 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
3237 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
3240 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)),
3241 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3249 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
3250 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
3275 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)),
3276 offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)));
3277 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)),
3278 offsetof(CPUX86State,xmm_regs[rm].XMM_L(2)));
3280 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)),
3281 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3282 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)),
3283 offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)));
3315 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)),
3316 offsetof(CPUX86State,xmm_regs[rm].XMM_L(1)));
3317 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)),
3318 offsetof(CPUX86State,xmm_regs[rm].XMM_L(3)));
3320 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)),
3321 offsetof(CPUX86State,xmm_regs[reg].XMM_L(1)));
3322 gen_op_movl(offsetof(CPUX86State,xmm_regs[reg].XMM_L(2)),
3323 offsetof(CPUX86State,xmm_regs[reg].XMM_L(3)));
3349 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3392 tcg_gen_ld32u_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3396 gen_op_movl(offsetof(CPUX86State,xmm_regs[rm].XMM_L(0)),
3397 offsetof(CPUX86State,xmm_regs[reg].XMM_L(0)));
3437 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3439 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(1)));
3558 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
3688 offsetof(XMMReg, XMM_L(0)));
3797 xmm_regs[reg].XMM_L(val & 3)));
3821 xmm_regs[reg].XMM_L(val & 3)));
3841 .XMM_L((val >> 6) & 3)));
3849 .XMM_L((val >> 4) & 3)));
3853 xmm_regs[reg].XMM_L(0)));
3857 xmm_regs[reg].XMM_L(1)));
3861 xmm_regs[reg].XMM_L(2)));
3865 xmm_regs[reg].XMM_L(3)));
3877 xmm_regs[reg].XMM_L(val & 3)));
3955 tcg_gen_st32_tl(cpu_T[0], cpu_env, offsetof(CPUX86State,xmm_t0.XMM_L(0)));
