Lines Matching refs:destination
78 // the same as the destination, the destination is ignored and
99 // its destination. All other moves from the spilled source have been
107 // Clear this move's destination to indicate a pending move. The actual
108 // destination is saved in a stack allocated local. Multiple moves can
111 LOperand* destination = moves_[index].destination();
116 // as this one's destination blocks this one so recursively perform all
120 if (other_move.Blocks(destination) && !other_move.IsPending()) {
129 // pending, so restore its destination.
130 moves_[index].set_destination(destination);
136 if (other_move.Blocks(destination)) {
149 // No operand should be the destination for more than one move.
151 LOperand* destination = moves_[i].destination();
153 SLOW_ASSERT(!destination->Equals(moves_[j].destination()));
165 ASSERT(moves_[index].destination()->Equals(moves_[root_index_].source()));
169 saved_destination_ = moves_[index].destination();
181 // This move will be done by restoring the saved value to the destination.
212 LOperand* destination = moves_[index].destination();
214 // Dispatch on the source and destination operand kinds. Not all
219 if (destination->IsRegister()) {
220 __ mov(cgen_->ToRegister(destination), source_register);
222 ASSERT(destination->IsStackSlot());
223 __ sw(source_register, cgen_->ToMemOperand(destination));
228 if (destination->IsRegister()) {
229 __ lw(cgen_->ToRegister(destination), source_operand);
231 ASSERT(destination->IsStackSlot());
232 MemOperand destination_operand = cgen_->ToMemOperand(destination);
235 // 'at' is overwritten while saving the value to the destination.
253 if (destination->IsRegister()) {
254 Register dst = cgen_->ToRegister(destination);
261 ASSERT(destination->IsStackSlot());
270 __ sw(kLithiumScratchReg, cgen_->ToMemOperand(destination));
275 if (destination->IsDoubleRegister()) {
276 __ mov_d(cgen_->ToDoubleRegister(destination), source_register);
278 ASSERT(destination->IsDoubleStackSlot());
279 MemOperand destination_operand = cgen_->ToMemOperand(destination);
285 if (destination->IsDoubleRegister()) {
286 __ ldc1(cgen_->ToDoubleRegister(destination), source_operand);
288 ASSERT(destination->IsDoubleStackSlot());
289 MemOperand destination_operand = cgen_->ToMemOperand(destination);
296 cgen_->ToHighMemOperand(destination);
