Lines Matching refs:opc2
2999 UInt opc2 = ifieldOPClo9(theInstr);
3087 switch (opc2) {
3604 vex_printf("dis_int_arith(ppc)(opc2)\n");
3637 UInt opc2 = ifieldOPClo10(theInstr);
3690 switch (opc2) {
3730 vex_printf("dis_int_cmp(ppc)(opc2)\n");
3755 UInt opc2 = ifieldOPClo10(theInstr);
3813 switch (opc2) {
4104 vex_printf("dis_int_logic(ppc)(opc2)\n");
4132 UInt opc2 = ifieldOPClo10(theInstr);
4165 switch (opc2) {
4241 vex_printf("dis_int_parity(ppc)(opc2)\n");
4265 UChar opc2 = toUChar( IFIELD( theInstr, 2, 3 ) );
4397 switch (opc2) {
4481 vex_printf("dis_int_rot(ppc)(opc2)\n");
4512 UInt opc2 = ifieldOPClo10(theInstr);
4609 switch (opc2) {
4713 vex_printf("dis_int_load(ppc)(opc2)\n");
4744 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
4769 UInt opc2 = ifieldOPClo10(theInstr);
4847 switch (opc2) {
4911 vex_printf("dis_int_store(ppc)(opc2)\n");
4932 vex_printf("dis_int_load(ppc)(0x3A, opc2)\n");
5100 UInt opc2 = ifieldOPClo10(theInstr);
5114 switch (opc2) {
5181 vex_printf("dis_int_ldst_str(ppc)(opc2)\n");
5270 UInt opc2 = ifieldOPClo10(theInstr);
5379 switch (opc2) {
5454 vex_printf("dis_int_branch(ppc)(opc2)\n");
5481 UInt opc2 = ifieldOPClo10(theInstr);
5493 if (opc2 == 0) { // mcrf (Move Cond Reg Field, PPC32 p464)
5509 switch (opc2) {
5550 vex_printf("dis_cond_logic(ppc)(opc2)\n");
5711 UInt opc2 = ifieldOPClo10(theInstr);
5722 switch (opc2) {
5816 UInt opc2 = ifieldOPClo10(theInstr);
5827 if (opc2 != 0x096) {
5828 vex_printf("dis_memsync(ppc)(0x13,opc2)\n");
5841 switch (opc2) {
5999 vex_printf("dis_memsync(ppc)(opc2)\n");
6024 UInt opc2 = ifieldOPClo10(theInstr);
6043 switch (opc2) {
6233 vex_printf("dis_int_shift(ppc)(opc2)\n");
6294 UInt opc2 = ifieldOPClo10(theInstr);
6309 switch (opc2) {
6370 vex_printf("dis_int_ldst_rev(ppc)(opc2)\n");
6399 UInt opc2 = ifieldOPClo10(theInstr);
6416 switch (opc2) {
6625 vex_printf("dis_proc_ctl(ppc)(opc2)\n");
6644 UInt opc2 = ifieldOPClo10(theInstr);
6655 if (opc1 == 0x1F && opc2 == 0x116) {
6659 if (opc1 == 0x1F && opc2 == 0x3F6) { // dcbz
6680 switch (opc2) {
6776 vex_printf("dis_cache_manage(ppc)(opc2)\n");
6940 UInt opc2 = ifieldOPClo10(theInstr);
6998 switch(opc2) {
7054 vex_printf("dis_fp_load(ppc)(opc2)\n");
7078 UInt opc2 = ifieldOPClo10(theInstr);
7141 switch(opc2) {
7185 vex_printf("dis_fp_store(ppc)(opc2)\n");
7210 UChar opc2 = ifieldOPClo5(theInstr);
7236 switch (opc2) {
7309 vex_printf("dis_fp_arith(ppc)(3B: opc2)\n");
7315 switch (opc2) {
7411 vex_printf("dis_fp_arith(ppc)(3F: opc2)\n");
7449 UChar opc2 = ifieldOPClo5(theInstr);
7493 switch (opc2) {
7511 if (opc2 == 0x1E) {
7531 vex_printf("dis_fp_multadd(ppc)(3B: opc2)\n");
7537 switch (opc2) {
7555 if (opc2 == 0x1E) {
7575 vex_printf("dis_fp_multadd(ppc)(3F: opc2)\n");
7927 UInt opc2 = ifieldOPClo10(theInstr);
7936 switch (opc2) {
7978 vex_printf("dis_fp_tests(ppc)(opc2)\n");
7996 UInt opc2 = ifieldOPClo10(theInstr);
8068 switch (opc2) {
8076 vex_printf("dis_fp_cmp(ppc)(opc2)\n");
8094 UInt opc2 = ifieldOPClo10(theInstr);
8124 switch (opc2) {
8141 switch (opc2) {
8168 DIP("fctiwu%s%s fr%u,fr%u\n", opc2 == 0x08F ? "z" : "",
8172 opc2 == 0x08F ? mkU32( Irrm_ZERO ) : rm,
8201 DIP("fctidu%s%s fr%u,fr%u\n", opc2 == 0x3AE ? "" : "z",
8204 binop(Iop_F64toI64U, opc2 == 0x3AE ? rm : mkU32(Irrm_ZERO), mkexpr(frB)) );
8224 switch(opc2) {
8270 vex_printf("dis_fp_round(ppc)(opc2)\n");
8302 UInt opc2 = ifieldOPClo10(theInstr);
8318 switch(opc2) {
8327 vex_printf("dis_fp_pair(ppc) : X-form wrong opc2\n");
8381 UInt opc2 = ifieldOPClo10(theInstr);
8391 if (opc1 != 0x3F || (frA_addr != 0 && opc2 != 0x008)) {
8398 switch (opc2) {
8453 vex_printf("dis_fp_move(ppc)(opc2)\n");
8479 UInt opc2 = ifieldOPClo10(theInstr);
8487 switch (opc2) {
8641 vex_printf("dis_fp_scr(ppc)(opc2)\n");
9296 UInt opc2 = ifieldOPClo10( theInstr );
9318 switch (opc2) {
9354 UInt opc2 = ifieldOPClo10( theInstr );
9376 switch (opc2) {
9411 UInt opc2 = ifieldOPClo9( theInstr );
9423 switch (opc2) {
9448 UInt opc2 = ifieldOPClo9( theInstr );
9460 switch (opc2) {
9485 UInt opc2 = ifieldOPClo10( theInstr );
9494 switch (opc2) {
9544 UInt opc2 = ifieldOPClo10( theInstr );
9555 switch (opc2) {
9606 UInt opc2 = ifieldOPClo8( theInstr );
9609 switch (opc2) {
9627 vex_printf("dis_dfp_round(ppc)(opc2)\n");
9648 UInt opc2 = ifieldOPClo8( theInstr );
9650 switch (opc2) {
9668 vex_printf("dis_dfp_roundq(ppc)(opc2)\n");
9681 UInt opc2 = ifieldOPClo8( theInstr );
9696 switch (opc2) {
9751 vex_printf("dis_dfp_quantize_sig_rrnd(ppc)(opc2)\n");
9765 UInt opc2 = ifieldOPClo8( theInstr );
9780 switch (opc2) {
9836 vex_printf("dis_dfp_quantize_sig_rrndq(ppc)(opc2)\n");
9850 UInt opc2 = ifieldOPClo10( theInstr );
9864 switch (opc2) {
9876 vex_printf("dis_dfp_extract_insert(ppc)(opc2)\n");
9891 UInt opc2 = ifieldOPClo10( theInstr );
9905 switch (opc2) {
9924 vex_printf("dis_dfp_extract_insertq(ppc)(opc2)\n");
9973 vex_printf("dis_dfp_compare(ppc)(opc2)\n");
10075 vex_printf("dis_dfp_exponent_test(ppc)(opc2)\n");
10215 UInt opc2 = ifieldOPClo9( theInstr );
10280 DIP("dtstd%s %u,r%u,%d\n", opc2 == 0xc2 ? "c" : "g",
10318 DIP("dtstd%sq %u,r%u,%d\n", opc2 == 0xc2 ? "c" : "g",
10369 vex_printf("dis_dfp_class_test(ppc)(opc2)\n");
10471 if (opc2 == 0xC2) { // dtstdc, dtstdcq
10506 } else if (opc2 == 0xE2) { // dtstdg, dtstdgq
10655 UInt opc2 = ifieldOPClo10( theInstr );
10674 switch ( opc2 ) {
10910 vpanic( "ERROR: dis_dfp_bcd(ppc), undefined opc2 case " );
10918 UInt opc2 = ifieldOPClo10( theInstr );
10937 switch ( opc2 ) {
11319 vpanic( "ERROR: dis_dfp_bcdq(ppc), undefined opc2 case " );
11533 UInt opc2 = ifieldOPClo10(theInstr);
11541 switch (opc2) {
11554 vex_printf("dis_av_datastream(ppc)(opc2,dst)\n");
11565 vex_printf("dis_av_datastream(ppc)(opc2)\n");
11581 UInt opc2 = IFIELD( theInstr, 0, 11 );
11588 switch (opc2) {
11591 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
11601 vex_printf("dis_av_procctl(ppc)(opc2,dst)\n");
11610 vex_printf("dis_av_procctl(ppc)(opc2)\n");
11620 dis_vx_conv ( UInt theInstr, UInt opc2 )
11636 switch (opc2) {
11688 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
11693 switch (opc2) {
11772 Bool un_signed = (opc2 == 0x110);
12050 vex_printf( "dis_vx_conv(ppc)(opc2)\n" );
12060 dis_vxv_dp_arith ( UInt theInstr, UInt opc2 )
12083 switch (opc2) {
12091 switch (opc2) {
12162 switch (opc2) {
12167 mdp = (opc2 & 0x0FF) == 0x0A4;
12174 mdp = (opc2 & 0x0FF) == 0x0E4;
12181 switch (opc2) {
12293 vex_printf( "dis_vxv_dp_arith(ppc)(opc2)\n" );
12303 dis_vxv_sp_arith ( UInt theInstr, UInt opc2 )
12326 switch (opc2) {
12423 switch (opc2) {
12426 msp = (opc2 & 0x0FF) == 0x024;
12433 msp = (opc2 & 0x0FF) == 0x064;
12442 switch (opc2) {
12613 vex_printf( "dis_vxv_sp_arith(ppc)(opc2)\n" );
12812 static IRExpr * _do_vsx_fp_roundToInt(IRTemp frB_I64, UInt opc2, UChar * insn_suffix)
12822 switch (opc2 & 0x7F) {
12845 vex_printf( "_do_vsx_fp_roundToInt(ppc)(opc2)\n" );
12901 dis_vxv_misc ( UInt theInstr, UInt opc2 )
12913 switch (opc2) {
12922 Bool redp = opc2 == 0x1B4;
12971 Bool resp = opc2 == 0x134;
13039 Bool isMin = opc2 == 0x320 ? True : False;
13088 Bool isMin = opc2 == 0x3A0 ? True : False;
13188 Bool make_negative = (opc2 == 0x3D2) ? True : False;
13215 Bool make_negative = (opc2 == 0x352) ? True : False;
13275 frD_fp_roundHi = _do_vsx_fp_roundToInt(frBHi_I64, opc2, insn_suffix);
13277 frD_fp_roundLo = _do_vsx_fp_roundToInt(frBLo_I64, opc2, insn_suffix);
13294 if (opc2 != 0x156) {
13296 switch (opc2) {
13315 vex_printf( "dis_vxv_misc(ppc)(vrspi<x>)(opc2)\n" );
13337 _do_vsx_fp_roundToInt(b3_I64, opc2, insn_suffix));
13339 _do_vsx_fp_roundToInt(b2_I64, opc2, insn_suffix));
13341 _do_vsx_fp_roundToInt(b1_I64, opc2, insn_suffix));
13343 _do_vsx_fp_roundToInt(b0_I64, opc2, insn_suffix));
13358 vex_printf( "dis_vxv_misc(ppc)(opc2)\n" );
13369 dis_vxs_arith ( UInt theInstr, UInt opc2 )
13392 switch (opc2) {
13412 Bool mdp = opc2 == 0x0A4;
13427 Bool mdp = opc2 == 0x0E4;
13448 Bool mdp = opc2 == 0x2A4;
13467 Bool mdp = opc2 == 0x2E4;
13544 vex_printf( "dis_vxs_arith(ppc)(opc2)\n" );
13556 dis_vx_cmp( UInt theInstr, UInt opc2 )
13574 switch (opc2) {
13578 DIP("xscmp%sdp crf%d,fr%u,fr%u\n", opc2 == 0x08c ? "u" : "o",
13585 vex_printf( "dis_vx_cmp(ppc)(opc2)\n" );
13680 dis_vvec_cmp( UInt theInstr, UInt opc2 )
13699 switch (opc2) {
13767 vex_printf( "dis_vvec_cmp(ppc)(opc2)\n" );
13776 dis_vxs_misc( UInt theInstr, UInt opc2 )
13799 switch (opc2) {
13864 Bool isMin = opc2 == 0x2A0 ? True : False;
13884 frD_fp_round = _do_vsx_fp_roundToInt(frB_I64, opc2, insn_suffix);
13901 Bool redp = opc2 == 0x0B4;
13924 vex_printf( "dis_vxs_misc(ppc)(opc2)\n" );
13934 dis_vx_logic ( UInt theInstr, UInt opc2 )
13952 switch (opc2) {
13976 vex_printf( "dis_vx_logic(ppc)(opc2)\n" );
13994 UInt opc2 = ifieldOPClo10( theInstr );
14006 switch (opc2) {
14065 vex_printf( "dis_vx_load(ppc)(opc2)\n" );
14084 UInt opc2 = ifieldOPClo10( theInstr );
14097 switch (opc2) {
14148 vex_printf( "dis_vx_store(ppc)(opc2)\n" );
14158 dis_vx_permute_misc( UInt theInstr, UInt opc2 )
14177 switch (opc2) {
14219 char type = (opc2 == 0x48) ? 'h' : 'l';
14220 IROp word_op = (opc2 == 0x48) ? Iop_V128HIto64 : Iop_V128to64;
14269 vex_printf( "dis_vx_permute_misc(ppc)(opc2)\n" );
14285 UInt opc2 = ifieldOPClo10(theInstr);
14300 switch (opc2) {
14401 vex_printf("dis_av_load(ppc)(opc2)\n");
14417 UInt opc2 = ifieldOPClo10(theInstr);
14435 switch (opc2) {
14487 vex_printf("dis_av_store(ppc)(opc2)\n");
14503 UInt opc2 = IFIELD( theInstr, 0, 11 );
14529 switch (opc2) {
14941 vex_printf("dis_av_arith(ppc)(opc2=0x%x)\n", opc2);
14957 UInt opc2 = IFIELD( theInstr, 0, 11 );
14969 switch (opc2) {
14998 vex_printf("dis_av_logic(ppc)(opc2=0x%x)\n", opc2);
15015 UInt opc2 = IFIELD( theInstr, 0, 10 );
15028 switch (opc2) {
15084 vex_printf("dis_av_cmp(ppc)(opc2)\n");
15107 UChar opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
15143 switch (opc2) {
15356 vex_printf("dis_av_multarith(ppc)(opc2)\n");
15372 UInt opc2 = IFIELD( theInstr, 0, 11 );
15384 switch (opc2) {
15493 vex_printf("dis_av_shift(ppc)(opc2)\n");
15513 UInt opc2 = toUChar( IFIELD( theInstr, 0, 6 ) );
15529 switch (opc2) {
15588 opc2 = IFIELD( theInstr, 0, 11 );
15589 switch (opc2) {
15674 vex_printf("dis_av_permute(ppc)(opc2)\n");
15690 UInt opc2 = IFIELD( theInstr, 0, 11 );
15704 switch (opc2) {
15841 switch (opc2) {
15939 vex_printf("dis_av_pack(ppc)(opc2)\n");
15957 UInt opc2=0;
15971 opc2 = IFIELD( theInstr, 0, 6 );
15972 switch (opc2) {
15995 opc2 = IFIELD( theInstr, 0, 11 );
15996 switch (opc2) {
16027 switch (opc2) {
16049 vex_printf("dis_av_fp_arith(ppc)(opc2=0x%x)\n",opc2);
16066 UInt opc2
16081 switch (opc2) {
16136 vex_printf("dis_av_fp_cmp(ppc)(opc2)\n");
16158 UInt opc2 = IFIELD( theInstr, 0, 11 );
16180 switch (opc2) {
16219 switch (opc2) {
16241 vex_printf("dis_av_fp_convert(ppc)(opc2)\n");
16482 UInt opc2;
16592 /* We don't know what it is. Set opc1/opc2 so decode_failure
16596 opc2 = ifieldOPClo10(theInstr);
16603 opc2 = ifieldOPClo10(theInstr);
16698 opc2 = ifieldOPClo10(theInstr);
16700 switch (opc2) {
16761 opc2 = ifieldOPClo9( theInstr );
16762 switch (opc2) {
16779 opc2 = ifieldOPClo8( theInstr );
16780 switch (opc2) {
16804 break; /* fall through to next opc2 check */
16807 opc2 = IFIELD(theInstr, 1, 5);
16808 switch (opc2) {
16845 UInt vsxOpc2 = get_VSX60_opc2(opc2);
16978 opc2 = IFIELD(theInstr, 1, 5);
16979 switch (opc2) {
17009 opc2 = IFIELD(theInstr, 1, 10);
17010 switch (opc2) {
17123 opc2 = ifieldOPClo9( theInstr );
17124 switch (opc2) {
17143 opc2 = ifieldOPClo8( theInstr );
17144 switch (opc2) {
17171 switch (opc2) {
17202 opc2 = IFIELD(theInstr, 1, 9);
17203 switch (opc2) {
17244 opc2 = IFIELD(theInstr, 1, 10);
17245 switch (opc2) {
17490 opc2 = IFIELD(theInstr, 0, 6);
17491 switch (opc2) {
17518 opc2 = IFIELD(theInstr, 0, 11);
17519 switch (opc2) {
17612 opc2 = IFIELD(theInstr, 0, 10);
17613 switch (opc2) {
17669 opc2 = (theInstr) & 0x7FF;
17673 opc1, opc1, opc2, opc2);
