Lines Matching refs:X0001
2690 #define X0001 BITS4(0,0,0,1)
2961 case ARMalu_XOR: subopc = X0001; break;
2981 case ARMsh_SHR: subopc = X0001; break;
2986 instr |= XXXXX__X(X1110,X0001,X1010,X0000,rD, /* _ _ */ rM);
2997 instr = XXXXXXXX(X1110,X0001,X0110,X1111,
2998 rDst,X1111,X0001,rSrc);
3102 instr = XXXXXXXX(X1110,X0001, BITS4(bP,1,0,0), iregNo(rN),
3109 instr = XXXXXXXX(X1110,X0001, BITS4(bP,1,0,1), iregNo(rN),
3322 instr = XXX___XX(i->ARMin.Call.cond, X0001, X0010, /*___*/
3343 X0011 : X0001;
3347 UInt instr = XXXXXXXX(X1110, X0111, subopc, rD, 0xF, rM, X0001, rN);
3474 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X0100,dM);
3477 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X1100,dM);
3501 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3506 insn = XXXXXXXX(0xE, X1110, BITS4(1,(fD & 1),1,1), X0001,
3757 opc = X0001 | (i->ARMin.NUnaryS.dst->index << 1);
3801 opc = X0001 | (i->ARMin.NUnaryS.src->index << 1);
3842 opc = X0001 | (i->ARMin.NUnaryS.src->index << 1);
3892 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regM, regD, X0001,
4105 regD, X0001, BITS4(1,Q,M,0), regM);
4109 regD, X0001, BITS4(0,Q,M,0), regM);
4139 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,0,0), regN, regD, X0001,
4143 insn = XXXXXXXX(0xF, X0010, BITS4(0,D,1,0), regN, regD, X0001,
4147 insn = XXXXXXXX(0xF, X0011, BITS4(0,D,0,0), regN, regD, X0001,
4176 X0001, BITS4(N,Q,M,0), regM);
4180 X0001, BITS4(N,Q,M,0), regM);
4710 #undef X0001
