Lines Matching full:addinstr
145 static void addInstr ( ISelEnv* env, ARMInstr* instr )
304 addInstr(env, ARMInstr_Imm32(rTmp, DEFAULT_FPSCR));
305 addInstr(env, ARMInstr_FPSCR(True/*toFPSCR*/, rTmp));
342 addInstr(env, ARMInstr_Shift(ARMsh_SHL, tL, irrm, ARMRI5_I5(1)));
343 addInstr(env, ARMInstr_Shift(ARMsh_SHR, tR, irrm, ARMRI5_I5(1)));
344 addInstr(env, ARMInstr_Alu(ARMalu_AND, tL, tL, ARMRI84_I84(2,0)));
345 addInstr(env, ARMInstr_Alu(ARMalu_AND, tR, tR, ARMRI84_I84(1,0)));
346 addInstr(env, ARMInstr_Alu(ARMalu_OR, t3, tL, ARMRI84_R(tR)));
347 addInstr(env, ARMInstr_Shift(ARMsh_SHL, t3, t3, ARMRI5_I5(22)));
348 addInstr(env, ARMInstr_FPSCR(True/*toFPSCR*/, t3));
488 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg],
498 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg],
510 addInstr(env, ARMInstr_Imm32( argregs[nextArgReg], 0xAA ));
517 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg], raLo ));
519 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg], raHi ));
538 addInstr(env, mk_iMOVds_RR( tmpregs[nextArgReg],
584 addInstr(env, ARMInstr_Imm32( argregs[i], 0xAA ));
589 addInstr( env, mk_iMOVds_RR( argregs[i], tmpregs[i] ) );
618 addInstr(env, ARMInstr_Call( cc, target, nextArgReg ));
980 addInstr(env, ARMInstr_CmpOrTst(False/*test*/, rTmp, one));
996 addInstr(env, ARMInstr_CmpOrTst(False/*test*/, rTmp, one));
1006 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r1, xFF));
1016 addInstr(env, ARMInstr_CmpOrTst(True/*isCmp*/, r1, zero));
1028 addInstr(env, ARMInstr_Alu(ARMalu_OR, tmp, tHi, ARMRI84_R(tLo)));
1029 addInstr(env, ARMInstr_CmpOrTst(True/*isCmp*/, tmp, zero));
1044 addInstr(env, ARMInstr_CmpOrTst(True/*isCmp*/, argL, argR));
1108 addInstr(env, ARMInstr_LdSt32(True/*isLoad*/, dst, amode));
1113 addInstr(env, ARMInstr_LdSt16(True/*isLoad*/, False/*!signedLoad*/,
1119 addInstr(env, ARMInstr_LdSt8U(True/*isLoad*/, dst, amode));
1124 //zz addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1128 //zz addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1147 //zz addInstr(env, X86Instr_FpBinary(
1154 //zz addInstr(env, X86Instr_FpStSW_AX());
1155 //zz addInstr(env, mk_iMOVsd_RR(hregX86_EAX(), dst));
1156 //zz addInstr(env, X86Instr_Alu32R(Xalu_AND, X86RMI_Imm(0x4700), dst));
1177 addInstr(env, ARMInstr_Alu(didInv ? ARMalu_BIC : ARMalu_AND,
1190 addInstr(env, ARMInstr_Alu(aop, dst, argL, argR));
1202 addInstr(env,
1218 addInstr(env, ARMInstr_Shift(sop, dst, argL, argR));
1230 addInstr(env, mk_iMOVds_RR(hregARM_R2(), argL));
1231 addInstr(env, mk_iMOVds_RR(hregARM_R3(), argR));
1232 addInstr(env, ARMInstr_Mul(ARMmul_PLAIN));
1233 addInstr(env, mk_iMOVds_RR(dst, hregARM_R0()));
1243 addInstr(env, ARMInstr_CmpOrTst(True/*isCmp*/, argL,
1245 addInstr(env, mk_iMOVds_RR(dst, argL));
1246 addInstr(env, ARMInstr_CMov(ARMcc_LO, dst, ARMRI84_R(argR)));
1256 addInstr(env, ARMInstr_VCmpD(dL, dR));
1258 addInstr(env, ARMInstr_Imm32(dst, 0));
1259 addInstr(env, ARMInstr_CMov(ARMcc_EQ, dst, ARMRI84_I84(0x40,0))); //EQ
1260 addInstr(env, ARMInstr_CMov(ARMcc_MI, dst, ARMRI84_I84(0x01,0))); //LT
1261 addInstr(env, ARMInstr_CMov(ARMcc_GT, dst, ARMRI84_I84(0x00,0))); //GT
1262 addInstr(env, ARMInstr_CMov(ARMcc_VS, dst, ARMRI84_I84(0x45,0))); //UN
1278 addInstr(env, ARMInstr_VCvtID(False/*!iToD*/, syned,
1283 addInstr(env, ARMInstr_VXferS(False/*!toS*/, valF, dst));
1305 addInstr(env, ARMInstr_NUnaryS(ARMneon_GETELEMS,
1330 addInstr(env, ARMInstr_NUnaryS(ARMneon_GETELEMS,
1392 addInstr(env, mk_iMOVds_RR(hregARM_R0(), regL));
1393 addInstr(env, mk_iMOVds_RR(hregARM_R1(), regR));
1394 addInstr(env, ARMInstr_Call( ARMcc_AL, (HWord)Ptr_to_ULong(fn), 2 ));
1395 addInstr(env, mk_iMOVds_RR(res, hregARM_R0()));
1414 //zz addInstr(env, mk_iMOVsd_RR(src,dst) );
1415 //zz addInstr(env, X86Instr_Alu32R(Xalu_AND,
1430 //zz addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1444 //zz addInstr(env, X86Instr_LoadEX(1,True,amode,dst));
1458 //zz addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1472 //zz addInstr(env, X86Instr_LoadEX(1,False,amode,dst));
1486 //zz addInstr(env, X86Instr_LoadEX(2,False,amode,dst));
1495 addInstr(env, ARMInstr_Alu(ARMalu_AND,
1505 //zz addInstr(env, mk_iMOVsd_RR(src,dst) );
1506 //zz addInstr(env, X86Instr_Alu32R(Xalu_AND,
1516 addInstr(env, ARMInstr_Shift(ARMsh_SHL, dst, src, amt));
1517 addInstr(env, ARMInstr_Shift(ARMsh_SHR, dst, dst, amt));
1525 addInstr(env, ARMInstr_Shift(ARMsh_SHL, dst, src, amt));
1526 addInstr(env, ARMInstr_Shift(ARMsh_SAR, dst, dst, amt));
1534 addInstr(env, ARMInstr_Unary(ARMun_NOT, dst, src));
1553 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
1566 //zz addInstr(env, mk_iMOVsd_RR(src,dst) );
1567 //zz addInstr(env, X86Instr_Sh32(Xsh_SHR, shift, dst));
1574 addInstr(env, ARMInstr_Mov(dst, ARMRI84_I84(0,0)));
1575 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
1586 addInstr(env, ARMInstr_Mov(dst, ARMRI84_I84(0,0)));
1587 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
1588 addInstr(env, ARMInstr_Shift(ARMsh_SHL, dst, dst, amt));
1589 addInstr(env, ARMInstr_Shift(ARMsh_SAR, dst, dst, amt));
1600 //zz addInstr(env, X86Instr_Set32(cond,dst));
1601 //zz addInstr(env, X86Instr_Sh32(Xsh_SHL, 31, dst));
1602 //zz addInstr(env, X86Instr_Sh32(Xsh_SAR, 31, dst));
1609 //zz addInstr(env, X86Instr_Bsfr32(True,src,dst));
1616 addInstr(env, ARMInstr_Unary(ARMun_CLZ, dst, src));
1623 addInstr(env, ARMInstr_Unary(ARMun_NEG, dst, src));
1624 addInstr(env, ARMInstr_Alu(ARMalu_OR, dst, dst, ARMRI84_R(src)));
1625 addInstr(env, ARMInstr_Shift(ARMsh_SAR, dst, dst, ARMRI5_I5(31)));
1632 addInstr(env, ARMInstr_Unary(ARMun_NEG, dst, src));
1633 addInstr(env, ARMInstr_Alu(ARMalu_OR, dst, dst, ARMRI84_R(src)));
1642 //zz addInstr(env, X86Instr_SseLdSt(False/*store*/, vec, esp0));
1643 //zz addInstr(env, X86Instr_Alu32R( Xalu_MOV, X86RMI_Mem(esp0), dst ));
1651 addInstr(env, ARMInstr_VXferS(False/*!toS*/, src, dst));
1680 addInstr(env, mk_iMOVds_RR(hregARM_R0(), arg));
1681 addInstr(env, ARMInstr_Call( ARMcc_AL, (HWord)Ptr_to_ULong(fn), 1 ));
1682 addInstr(env, mk_iMOVds_RR(res, hregARM_R0()));
1695 addInstr(env, ARMInstr_LdSt32(
1703 //zz addInstr(env, X86Instr_LoadEX(
1720 //zz addInstr(env, X86Instr_LoadEX( 1, False, am, dst ));
1724 //zz addInstr(env, X86Instr_Alu32R(Xalu_MOV, X86RMI_Mem(am), dst));
1744 addInstr(env, mk_iMOVds_RR(dst, hregARM_R0()));
1761 addInstr(env, ARMInstr_Imm32(dst, u));
1779 addInstr(env, mk_iMOVds_RR(dst, rX));
1781 addInstr(env, ARMInstr_CMov(cc ^ 1, dst, r0));
1791 addInstr(env, mk_iMOVds_RR(dst, rX));
1793 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r8,
1795 addInstr(env, ARMInstr_CMov(ARMcc_EQ, dst, r0));
1845 addInstr(env, ARMInstr_Imm32(tHi, wHi));
1846 addInstr(env, ARMInstr_Imm32(tLo, wLo));
1858 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
1874 addInstr(env, ARMInstr_LdSt32(True/*isLoad*/, tHi, ARMAMode1_RI(rA, 4)));
1875 addInstr(env, ARMInstr_LdSt32(True/*isLoad*/, tLo, ARMAMode1_RI(rA, 0)));
1887 addInstr(env, ARMInstr_LdSt32(True/*isLoad*/, tHi, am4));
1888 addInstr(env, ARMInstr_LdSt32(True/*isLoad*/, tLo, am0));
1907 addInstr(env, mk_iMOVds_RR(hregARM_R2(), argL));
1908 addInstr(env, mk_iMOVds_RR(hregARM_R3(), argR));
1909 addInstr(env, ARMInstr_Mul(mop));
1910 addInstr(env, mk_iMOVds_RR(tHi, hregARM_R1()));
1911 addInstr(env, mk_iMOVds_RR(tLo, hregARM_R0()));
1923 addInstr(env, ARMInstr_Alu(ARMalu_OR, tHi, xHi, ARMRI84_R(yHi)));
1924 addInstr(env, ARMInstr_Alu(ARMalu_OR, tLo, xLo, ARMRI84_R(yLo)));
1936 addInstr(env, ARMInstr_Alu(ARMalu_ADDS, tLo, xLo, ARMRI84_R(yLo)));
1937 addInstr(env, ARMInstr_Alu(ARMalu_ADC, tHi, xHi, ARMRI84_R(yHi)));
1964 addInstr(env, ARMInstr_VXferD(False/*!toD*/, src, dstHi, dstLo));
1979 addInstr(env, ARMInstr_Imm32(zero, 0));
1981 addInstr(env, ARMInstr_Alu(ARMalu_SUBS,
1984 addInstr(env, ARMInstr_Alu(ARMalu_SBC,
1989 addInstr(env, ARMInstr_Alu(ARMalu_OR, tHi, tHi, ARMRI84_R(yHi)));
1990 addInstr(env, ARMInstr_Alu(ARMalu_OR, tLo, tLo, ARMRI84_R(yLo)));
2004 addInstr(env, ARMInstr_Alu(ARMalu_OR,
2007 addInstr(env, ARMInstr_Unary(ARMun_NEG, tmp2, tmp1));
2008 addInstr(env, ARMInstr_Alu(ARMalu_OR,
2010 addInstr(env, ARMInstr_Shift(ARMsh_SAR,
2024 addInstr(env, ARMInstr_Mov(dst, ARMRI84_I84(0,0)));
2025 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
2026 addInstr(env, ARMInstr_Shift(ARMsh_SHL, dst, dst, amt));
2027 addInstr(env, ARMInstr_Shift(ARMsh_SAR, dst, dst, amt));
2048 addInstr(env, mk_iMOVds_RR(dstHi, rXhi));
2049 addInstr(env, mk_iMOVds_RR(dstLo, rXlo));
2051 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r8,
2053 addInstr(env, ARMInstr_CMov(ARMcc_EQ, dstHi, ARMRI84_R(r0hi)));
2054 addInstr(env, ARMInstr_CMov(ARMcc_EQ, dstLo, ARMRI84_R(r0lo)));
2067 addInstr(env, ARMInstr_VXferD(False, tmp, tHi, tLo));
2106 addInstr(env, ARMInstr_VXferD(True/*toD*/, res, rHi, rLo));
2115 addInstr(env, ARMInstr_NLdStD(True, res, am));
2124 addInstr(env, ARMInstr_Add32(addr, hregARM_R8(), e->Iex.Get.offset));
2125 addInstr(env, ARMInstr_NLdStD(True, res, mkARMAModeN_R(addr)));
2139 addInstr(env, ARMInstr_VXferD(True/*toD*/, res, rHi, rLo));
2147 addInstr(env, ARMInstr_NBinary(ARMneon_VAND,
2155 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
2163 addInstr(env, ARMInstr_NBinary(ARMneon_VXOR,
2173 addInstr(env, ARMInstr_VXferD(True/*toD*/, res, rHi, rLo));
2192 addInstr(env, ARMInstr_NBinary(ARMneon_VADD,
2201 addInstr(env, ARMInstr_NBinary(ARMneon_VADDFP,
2210 addInstr(env, ARMInstr_NBinary(ARMneon_VRECPS,
2219 addInstr(env, ARMInstr_NBinary(ARMneon_VRSQRTS,
2245 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2247 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2249 addInstr(env, ARMInstr_NDual(ARMneon_TRN,
2252 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2254 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2256 addInstr(env, ARMInstr_NDual(ARMneon_TRN,
2279 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2281 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2283 addInstr(env, ARMInstr_NDual(ARMneon_ZIP,
2286 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2288 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2290 addInstr(env, ARMInstr_NDual(ARMneon_ZIP,
2313 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2315 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2317 addInstr(env, ARMInstr_NDual(ARMneon_UZP,
2320 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2322 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
2324 addInstr(env, ARMInstr_NDual(ARMneon_UZP,
2344 addInstr(env, ARMInstr_NBinary(ARMneon_VQADDU,
2363 addInstr(env, ARMInstr_NBinary(ARMneon_VQADDS,
2382 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
2391 addInstr(env, ARMInstr_NBinary(ARMneon_VSUBFP,
2410 addInstr(env, ARMInstr_NBinary(ARMneon_VQSUBU,
2429 addInstr(env, ARMInstr_NBinary(ARMneon_VQSUBS,
2446 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXU,
2463 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXS,
2480 addInstr(env, ARMInstr_NBinary(ARMneon_VMINU,
2497 addInstr(env, ARMInstr_NBinary(ARMneon_VMINS,
2517 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0,0)));
2518 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
2520 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
2539 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
2558 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0,0)));
2559 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
2561 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
2578 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
2597 addInstr(env, ARMInstr_NShift(ARMneon_VQSHL,
2616 addInstr(env, ARMInstr_NShift(ARMneon_VQSAL,
2640 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUU,
2664 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUS,
2688 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
2709 addInstr(env, ARMInstr_Unary(ARMun_NEG, argR2, argR));
2710 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, tmp, argR2, 0, False));
2711 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
2731 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, tmp, argR, 0, False));
2732 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
2753 addInstr(env, ARMInstr_Unary(ARMun_NEG, argR2, argR));
2754 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, tmp, argR2, 0, False));
2755 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
2772 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTU,
2789 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTS,
2806 addInstr(env, ARMInstr_NBinary(ARMneon_VCEQ,
2823 addInstr(env, ARMInstr_NBinary(ARMneon_VMUL,
2832 addInstr(env, ARMInstr_NBinary(ARMneon_VMULFP,
2847 addInstr(env, ARMInstr_NBinary(ARMneon_VQDMULH,
2863 addInstr(env, ARMInstr_NBinary(ARMneon_VQRDMULH,
2881 addInstr(env, ARMInstr_NBinary(ARMneon_VPADD,
2890 addInstr(env, ARMInstr_NBinary(ARMneon_VPADDFP,
2907 addInstr(env, ARMInstr_NBinary(ARMneon_VPMINU,
2924 addInstr(env, ARMInstr_NBinary(ARMneon_VPMINS,
2941 addInstr(env, ARMInstr_NBinary(ARMneon_VPMAXU,
2958 addInstr(env, ARMInstr_NBinary(ARMneon_VPMAXS,
2966 addInstr(env, ARMInstr_NBinary(ARMneon_VTBL,
2975 addInstr(env, ARMInstr_NBinary(ARMneon_VMULP,
2983 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXF,
2991 addInstr(env, ARMInstr_NBinary(ARMneon_VMINF,
2999 addInstr(env, ARMInstr_NBinary(ARMneon_VPMAXF,
3007 addInstr(env, ARMInstr_NBinary(ARMneon_VPMINF,
3015 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTF,
3023 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEF,
3031 addInstr(env, ARMInstr_NBinary(ARMneon_VCEQF,
3058 addInstr(env, ARMInstr_NUnary(op, res, arg, imm6, False));
3087 addInstr(env, ARMInstr_NUnary(ARMneon_VDUP,
3111 addInstr(env, ARMInstr_VXferD(True/*toD*/, res, rHi, rLo));
3145 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 0, False));
3150 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 1, False));
3155 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 2, False));
3161 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3168 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3175 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3182 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3189 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3196 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3202 addInstr(env, ARMInstr_NUnary(ARMneon_NOT, res, arg, 4, False));
3230 addInstr(env, ARMInstr_NUnaryS(
3249 addInstr(env, ARMInstr_NUnaryS(
3268 addInstr(env, ARMInstr_NUnaryS(
3286 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, res, arg, size, False));
3301 addInstr(env, ARMInstr_NUnary(ARMneon_ABS, res, arg, size, False));
3316 addInstr(env, ARMInstr_NUnary(ARMneon_REV64,
3330 addInstr(env, ARMInstr_NUnary(ARMneon_REV32,
3338 addInstr(env, ARMInstr_NUnary(ARMneon_REV16,
3353 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, tmp2, arg, 2, False));
3354 addInstr(env, ARMInstr_NUnary(ARMneon_NOT, x, tmp2, 4, False));
3355 addInstr(env, ARMInstr_NeonImm(lsh_amt, ARMNImm_TI(0, 32)));
3356 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0, 0)));
3357 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
3359 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
3361 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
3363 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
3365 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
3382 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, tmp, arg, size, False));
3383 addInstr(env, ARMInstr_NUnary(ARMneon_NOT, res, tmp, 4, False));
3398 addInstr(env, ARMInstr_NUnary(ARMneon_COPYN,
3414 addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNSS,
3430 addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNUS,
3446 addInstr(env, ARMInstr_NUnary(ARMneon_COPYQNUU,
3462 addInstr(env, ARMInstr_NUnary(ARMneon_PADDLS,
3478 addInstr(env, ARMInstr_NUnary(ARMneon_PADDLU,
3486 addInstr(env, ARMInstr_NUnary(ARMneon_CNT,
3502 addInstr(env, ARMInstr_NUnary(ARMneon_CLZ,
3518 addInstr(env, ARMInstr_NUnary(ARMneon_CLS,
3525 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTFtoS,
3532 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTFtoU,
3539 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTStoF,
3546 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTUtoF,
3553 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTF32toF16,
3560 addInstr(env, ARMInstr_NUnary(ARMneon_VRECIPF,
3567 addInstr(env, ARMInstr_NUnary(ARMneon_VRECIP,
3582 addInstr(env, ARMInstr_NBinary(ARMneon_VABDFP,
3588 addInstr(env, ARMInstr_NUnary(ARMneon_VABSFP,
3596 addInstr(env, ARMInstr_NUnary(ARMneon_VRSQRTEFP,
3603 addInstr(env, ARMInstr_NUnary(ARMneon_VRSQRTE,
3610 addInstr(env, ARMInstr_NUnary(ARMneon_VNEGF,
3638 addInstr(env, ARMInstr_NBinary(ARMneon_VEXT,
3661 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, res, dreg, 4, False));
3662 addInstr(env, ARMInstr_NUnaryS(ARMneon_SETELEM,
3678 addInstr(env, ARMInstr_VXferD(True/*toD*/, res, rHi, rLo));
3713 addInstr(env, ARMInstr_NeonImm(res, ARMNImm_TI(0, 0)));
3724 addInstr(env, ARMInstr_NLdStQ(True, res, am));
3732 addInstr(env, ARMInstr_Add32(addr, hregARM_R8(), e->Iex.Get.offset));
3733 addInstr(env, ARMInstr_NLdStQ(True, res, mkARMAModeN_R(addr)));
3770 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 0, True));
3775 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 1, True));
3780 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, res, arg, 2, True));
3786 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3793 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3800 addInstr(env, ARMInstr_NBinary(ARMneon_VCGES,
3807 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3814 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3821 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEU,
3827 addInstr
3855 addInstr(env, ARMInstr_NUnaryS(
3874 addInstr(env, ARMInstr_NUnaryS(
3893 addInstr(env, ARMInstr_NUnaryS(
3911 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, res, arg, size, True));
3926 addInstr(env, ARMInstr_NUnary(ARMneon_ABS, res, arg, size, True));
3941 addInstr(env, ARMInstr_NUnary(ARMneon_REV64,
3955 addInstr(env, ARMInstr_NUnary(ARMneon_REV32,
3963 addInstr(env, ARMInstr_NUnary(ARMneon_REV16,
3978 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, tmp2, arg, 2, True));
3979 addInstr(env, ARMInstr_NUnary(ARMneon_NOT, x, tmp2, 4, True));
3980 addInstr(env, ARMInstr_NeonImm(lsh_amt, ARMNImm_TI(0, 32)));
3981 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0, 0)));
3982 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
3984 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
3986 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
3988 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
3990 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
4007 addInstr(env, ARMInstr_NUnary(ARMneon_EQZ, tmp, arg, size, True));
4008 addInstr(env, ARMInstr_NUnary(ARMneon_NOT, res, tmp, 4, True));
4023 addInstr(env, ARMInstr_NUnary(ARMneon_COPYLU,
4039 addInstr(env, ARMInstr_NUnary(ARMneon_COPYLS,
4055 addInstr(env, ARMInstr_NUnary(ARMneon_PADDLS,
4071 addInstr(env, ARMInstr_NUnary(ARMneon_PADDLU,
4079 addInstr(env, ARMInstr_NUnary(ARMneon_CNT, res, arg, size, True));
4094 addInstr(env, ARMInstr_NUnary(ARMneon_CLZ, res, arg, size, True));
4109 addInstr(env, ARMInstr_NUnary(ARMneon_CLS, res, arg, size, True));
4115 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTFtoS,
4122 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTFtoU,
4129 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTStoF,
4136 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTUtoF,
4143 addInstr(env, ARMInstr_NUnary(ARMneon_VCVTF16toF32,
4150 addInstr(env, ARMInstr_NUnary(ARMneon_VRECIPF,
4157 addInstr(env, ARMInstr_NUnary(ARMneon_VRECIP,
4172 addInstr(env, ARMInstr_NBinary(ARMneon_VABDFP,
4178 addInstr(env, ARMInstr_NUnary(ARMneon_VABSFP,
4186 addInstr(env, ARMInstr_NUnary(ARMneon_VRSQRTEFP,
4193 addInstr(env, ARMInstr_NUnary(ARMneon_VRSQRTE,
4200 addInstr(env, ARMInstr_NUnary(ARMneon_VNEGF,
4224 addInstr(env, ARMInstr_NeonImm(res, imm));
4233 addInstr(env, ARMInstr_NeonImm(tmp1, ARMNImm_TI(9,0x0f)));
4234 addInstr(env, ARMInstr_NeonImm(tmp2, imm));
4235 addInstr(env, ARMInstr_NBinary(ARMneon_VAND,
4246 addInstr(env, ARMInstr_NeonImm(tmp1, ARMNImm_TI(9,0xf0)));
4247 addInstr(env, ARMInstr_NeonImm(tmp2, imm));
4248 addInstr(env, ARMInstr_NBinary(ARMneon_VAND,
4268 addInstr(env, ARMInstr_Alu(ARMalu_SUB, hregARM_R13(),
4273 addInstr(env, ARMInstr_LdSt32(False/*store*/, w0, sp_0));
4274 addInstr(env, ARMInstr_LdSt32(False/*store*/, w1, sp_4));
4278 addInstr(env, ARMInstr_LdSt32(False/*store*/, w2, sp_8));
4279 addInstr(env, ARMInstr_LdSt32(False/*store*/, w3, sp_12));
4282 addInstr(env, ARMInstr_NLdStQ(True/*load*/, res,
4286 addInstr(env, ARMInstr_Alu(ARMalu_ADD, hregARM_R13(),
4295 addInstr(env, ARMInstr_NBinary(ARMneon_VAND,
4303 addInstr(env, ARMInstr_NBinary(ARMneon_VORR,
4311 addInstr(env, ARMInstr_NBinary(ARMneon_VXOR,
4357 addInstr(env, ARMInstr_NBinary(ARMneon_VADD,
4366 addInstr(env, ARMInstr_NBinary(ARMneon_VADDFP,
4375 addInstr(env, ARMInstr_NBinary(ARMneon_VRECPS,
4384 addInstr(env, ARMInstr_NBinary(ARMneon_VRSQRTS,
4412 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4414 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4416 addInstr(env, ARMInstr_NDual(ARMneon_TRN,
4419 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4421 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4423 addInstr(env, ARMInstr_NDual(ARMneon_TRN,
4452 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4454 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4456 addInstr(env, ARMInstr_NDual(ARMneon_ZIP,
4459 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4461 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4463 addInstr(env, ARMInstr_NDual(ARMneon_ZIP,
4492 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4494 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4496 addInstr(env, ARMInstr_NDual(ARMneon_UZP,
4499 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4501 addInstr(env, ARMInstr_NUnary(ARMneon_COPY,
4503 addInstr(env, ARMInstr_NDual(ARMneon_UZP,
4525 addInstr(env, ARMInstr_NBinary(ARMneon_VQADDU,
4546 addInstr(env, ARMInstr_NBinary(ARMneon_VQADDS,
4567 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
4576 addInstr(env, ARMInstr_NBinary(ARMneon_VSUBFP,
4597 addInstr(env, ARMInstr_NBinary(ARMneon_VQSUBU,
4618 addInstr(env, ARMInstr_NBinary(ARMneon_VQSUBS,
4635 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXU,
4652 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXS,
4669 addInstr(env, ARMInstr_NBinary(ARMneon_VMINU,
4686 addInstr(env, ARMInstr_NBinary(ARMneon_VMINS,
4707 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0,0)));
4708 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
4710 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
4729 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
4750 addInstr(env, ARMInstr_NeonImm(zero, ARMNImm_TI(0,0)));
4751 addInstr(env, ARMInstr_NBinary(ARMneon_VSUB,
4753 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
4772 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
4791 addInstr(env, ARMInstr_NShift(ARMneon_VQSHL,
4810 addInstr(env, ARMInstr_NShift(ARMneon_VQSAL,
4834 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUU,
4858 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNUS,
4882 addInstr(env, ARMInstr_NUnary(ARMneon_VQSHLNSS,
4903 addInstr(env, ARMInstr_Unary(ARMun_NEG, argR2, argR));
4904 addInstr(env, ARMInstr_NUnary(ARMneon_DUP,
4906 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
4926 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, tmp, argR, 0, True));
4927 addInstr(env, ARMInstr_NShift(ARMneon_VSHL,
4948 addInstr(env, ARMInstr_Unary(ARMun_NEG, argR2, argR));
4949 addInstr(env, ARMInstr_NUnary(ARMneon_DUP, tmp, argR2, 0, True));
4950 addInstr(env, ARMInstr_NShift(ARMneon_VSAL,
4967 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTU,
4984 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTS,
5001 addInstr(env, ARMInstr_NBinary(ARMneon_VCEQ,
5018 addInstr(env, ARMInstr_NBinary(ARMneon_VMUL,
5027 addInstr(env, ARMInstr_NBinary(ARMneon_VMULFP,
5044 addInstr(env, ARMInstr_NBinary(ARMneon_VMULLU,
5062 addInstr(env, ARMInstr_NBinary(ARMneon_VMULLS,
5078 addInstr(env, ARMInstr_NBinary(ARMneon_VQDMULH,
5094 addInstr(env, ARMInstr_NBinary(ARMneon_VQRDMULH,
5110 addInstr(env, ARMInstr_NBinary(ARMneon_VQDMULL,
5119 addInstr(env, ARMInstr_NBinary(ARMneon_VMULP,
5127 addInstr(env, ARMInstr_NBinary(ARMneon_VMAXF,
5135 addInstr(env, ARMInstr_NBinary(ARMneon_VMINF,
5143 addInstr(env, ARMInstr_NBinary(ARMneon_VPMAXF,
5151 addInstr(env, ARMInstr_NBinary(ARMneon_VPMINF,
5159 addInstr(env, ARMInstr_NBinary(ARMneon_VCGTF,
5167 addInstr(env, ARMInstr_NBinary(ARMneon_VCGEF,
5175 addInstr(env, ARMInstr_NBinary(ARMneon_VCEQF,
5185 addInstr(env, ARMInstr_NBinary(ARMneon_VMULLP,
5212 addInstr(env, ARMInstr_NUnary(op, res, arg, imm6, True));
5240 addInstr(env, ARMInstr_NUnary(ARMneon_VDUP,
5258 addInstr(env, ARMInstr_NBinary(ARMneon_VPADD,
5287 addInstr(env, ARMInstr_NBinary(ARMneon_VEXT,
5301 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, dst, rX, 4, True));
5303 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r8,
5305 addInstr(env, ARMInstr_NCMovQ(ARMcc_EQ, dst, r0));
5351 addInstr(env, ARMInstr_Imm32(z32, 0));
5352 addInstr(env, ARMInstr_VXferD(True/*toD*/, dst, z32, z32));
5362 addInstr(env, ARMInstr_VLdStD(True/*isLoad*/, res, am));
5371 addInstr(env, ARMInstr_VLdStD(True/*isLoad*/, res, am));
5384 addInstr(env, ARMInstr_VXferD(True/*toD*/, dst, srcHi, srcLo));
5391 addInstr(env, ARMInstr_VUnaryD(ARMvfpu_NEG, dst, src));
5397 addInstr(env, ARMInstr_VUnaryD(ARMvfpu_ABS, dst, src));
5403 addInstr(env, ARMInstr_VCvtSD(True/*sToD*/, dst, src));
5413 addInstr(env, ARMInstr_VXferS(True/*toS*/, f32, src));
5415 addInstr(env, ARMInstr_VCvtID(True/*iToD*/, syned,
5430 addInstr(env, ARMInstr_VUnaryD(ARMvfpu_SQRT, dst, src));
5457 addInstr(env, ARMInstr_VAluD(op, dst, argL, argR));
5472 addInstr(env, ARMInstr_VUnaryD(ARMvfpu_COPY, dst, rX));
5474 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r8,
5476 addInstr(env, ARMInstr_VCMovD(ARMcc_EQ, dst, r0));
5522 addInstr(env, ARMInstr_VLdStS(True/*isLoad*/, res, am));
5531 addInstr(env, ARMInstr_VLdStS(True/*isLoad*/, res, am));
5540 addInstr(env, ARMInstr_VXferS(True/*toS*/, dst, src));
5546 addInstr(env, ARMInstr_VUnaryS(ARMvfpu_NEG, dst, src));
5552 addInstr(env, ARMInstr_VUnaryS(ARMvfpu_ABS, dst, src));
5566 addInstr(env, ARMInstr_VUnaryS(ARMvfpu_SQRT, dst, src));
5574 addInstr(env, ARMInstr_VCvtSD(False/*!sToD*/, valS, valD));
5602 addInstr(env, ARMInstr_VAluS(op, dst, argL, argR));
5617 addInstr(env, ARMInstr_VUnaryS(ARMvfpu_COPY, dst, rX));
5619 addInstr(env, ARMInstr_CmpOrTst(False/*!isCmp*/, r8,
5621 addInstr(env, ARMInstr_VCMovS(ARMcc_EQ, dst, r0));
5657 addInstr(env, ARMInstr_LdSt32(False/*!isLoad*/, rD, am));
5663 addInstr(env, ARMInstr_LdSt16(False/*!isLoad*/,
5670 addInstr(env, ARMInstr_LdSt8U(False/*!isLoad*/, rD, am));
5677 addInstr(env, ARMInstr_NLdStD(False, dD, am));
5682 addInstr(env, ARMInstr_LdSt32(False/*!load*/, rDhi,
5684 addInstr(env, ARMInstr_LdSt32(False/*!load*/, rDlo,
5692 addInstr(env, ARMInstr_VLdStD(False/*!isLoad*/, dD, am));
5698 addInstr(env, ARMInstr_VLdStS(False/*!isLoad*/, fD, am));
5704 addInstr(env, ARMInstr_NLdStQ(False, qD, am));
5719 addInstr(env, ARMInstr_LdSt32(False/*!isLoad*/, rD, am));
5726 addInstr(env, ARMInstr_Add32(addr, hregARM_R8(),
5728 addInstr(env, ARMInstr_NLdStD(False, qD, mkARMAModeN_R(addr)));
5736 addInstr(env, ARMInstr_LdSt32(False/*!isLoad*/, rDhi, am4));
5737 addInstr(env, ARMInstr_LdSt32(False/*!isLoad*/, rDlo, am0));
5746 addInstr(env, ARMInstr_VLdStD(False/*!isLoad*/, rD, am));
5754 addInstr(env, ARMInstr_VLdStS(False/*!isLoad*/, rD, am));
5760 addInstr(env, ARMInstr_Add32(addr, hregARM_R8(),
5762 addInstr(env, ARMInstr_NLdStQ(False, qD, mkARMAModeN_R(addr)));
5780 //zz addInstr(env, ARMInstr_StoreB(reg, am2));
5797 addInstr(env, ARMInstr_Mov(dst,ri84));
5803 addInstr(env, ARMInstr_Mov(dst, ARMRI84_I84(0,0)));
5804 addInstr(env, ARMInstr_CMov(cond, dst, ARMRI84_I84(1,0)));
5811 addInstr(env, ARMInstr_NUnary(ARMneon_COPY, dst, src, 4, False));
5816 addInstr(env, mk_iMOVds_RR(dstHi, rHi) );
5817 addInstr(env, mk_iMOVds_RR(dstLo, rLo) );
5824 addInstr(env, ARMInstr_VUnaryD(ARMvfpu_COPY, dst, src));
5830 addInstr(env, ARMInstr_VUnaryS(ARMvfpu_COPY, dst, src));
5836 addInstr
5869 addInstr(env, ARMInstr_VXferD(True, tmp, hregARM_R1(),
5876 addInstr(env, mk_iMOVds_RR(dstHi, hregARM_R1()) );
5877 addInstr(env, mk_iMOVds_RR(dstLo, hregARM_R0()) );
5885 addInstr(env, mk_iMOVds_RR(dst, hregARM_R0()) );
5908 addInstr(env, mk_iMOVds_RR(hregARM_R4(), raddr));
5909 addInstr(env, ARMInstr_LdrEX(szB));
5910 addInstr(env, mk_iMOVds_RR(r_dst, hregARM_R2()));
5915 addInstr(env, mk_iMOVds_RR(hregARM_R4(), raddr));
5916 addInstr(env, ARMInstr_LdrEX(8));
5923 addInstr(env, ARMInstr_VXferD(True, dst, hregARM_R3(),
5928 addInstr(env, mk_iMOVds_RR(r_dst_lo, hregARM_R2()));
5929 addInstr(env, mk_iMOVds_RR(r_dst_hi, hregARM_R3()));
5948 addInstr(env, mk_iMOVds_RR(hregARM_R2(), rD));
5949 addInstr(env, mk_iMOVds_RR(hregARM_R4(), rA));
5950 addInstr(env, ARMInstr_StrEX(szB));
5961 addInstr(env, mk_iMOVds_RR(hregARM_R2(), rDlo));
5962 addInstr(env, mk_iMOVds_RR(hregARM_R3(), rDhi));
5963 addInstr(env, mk_iMOVds_RR(hregARM_R4(), rA));
5964 addInstr(env, ARMInstr_StrEX(8));
5974 addInstr(env, ARMInstr_Alu(ARMalu_XOR, r_res, hregARM_R0(), one));
5976 addInstr(env, ARMInstr_Alu(ARMalu_AND, r_res, r_res, one));
5986 addInstr(env, ARMInstr_MFence());
5989 addInstr(env, ARMInstr_CLREX());
6025 addInstr(env, ARMInstr_XDirect(stmt->Ist.Exit.dst->Ico.U32,
6032 addInstr(env, ARMInstr_XAssisted(r, amR15T, cc, Ijk_Boring));
6047 addInstr(env, ARMInstr_XAssisted(r, amR15T, cc,
6096 addInstr(env, ARMInstr_XDirect(cdst->Ico.U32,
6104 addInstr(env, ARMInstr_XAssisted(r, amR15T, ARMcc_AL,
6117 addInstr(env, ARMInstr_XIndir(r, amR15T, ARMcc_AL));
6119 addInstr(env, ARMInstr_XAssisted(r, amR15T, ARMcc_AL,
6138 addInstr(env, ARMInstr_XAssisted(r, amR15T, ARMcc_AL, jk));
6235 addInstr(env, ARMInstr_EvCheck(amCounter, amFailAddr));
6242 addInstr(env, ARMInstr_ProfInc());
