Lines Matching refs:m32
53 adcl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
54 adcl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[100000000]
57 adcl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
58 adcl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[100000000]
59 adcl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
60 adcl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[100000000]
77 addl imm32[12345678] m32.ud[87654321] => 1.ud[99999999]
79 addl r32.ud[12345678] m32.ud[87654321] => 1.ud[99999999]
80 addl m32.ud[12345678] r32.ud[87654321] => 1.ud[99999999]
97 andl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x02005430]
99 andl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x02005430]
100 andl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x02005430]
104 bsfl m32.ud[0x75318642] r32.ud[0] => 1.ud[1]
108 bsrl m32.ud[0x75318642] r32.ud[0] => 1.ud[30]
120 btl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
121 btl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
124 btl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
125 btl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
136 btcl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
137 btcl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
140 btcl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
141 btcl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
152 btrl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
153 btrl imm8[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
156 btrl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427530] eflags[0x001,0x001]
157 btrl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x000]
168 btsl imm8[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
169 btsl imm8[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
172 btsl r32.ud[0] m32.ud[0x86427531] => 1.ud[0x86427531] eflags[0x001,0x001]
173 btsl r32.ud[24] m32.ud[0x86427531] => 1.ud[0x87427531] eflags[0x001,0x000]
334 cmpl imm8[3] m32.ud[2] => eflags[0x010,0x010]
335 cmpl imm8[2] m32.ud[3] => eflags[0x010,0x000]
336 cmpl imm8[12] m32.ud[12] => eflags[0x044,0x044]
337 cmpl imm8[12] m32.ud[34] => eflags[0x044,0x000]
338 cmpl imm8[34] m32.ud[12] => eflags[0x081,0x081]
339 cmpl imm8[12] m32.ud[34] => eflags[0x081,0x000]
340 cmpl imm8[100] m32.sd[-2147483600] => eflags[0x800,0x800]
341 cmpl imm8[50] m32.sd[-50] => eflags[0x800,0x000]
342 cmpl imm8[-50] m32.sd[50] => eflags[0x800,0x000]
343 cmpl imm8[-100] m32.sd[2147483600] => eflags[0x800,0x800]
364 cmpl imm32[3] m32.ud[2] => eflags[0x010,0x010]
365 cmpl imm32[2] m32.ud[3] => eflags[0x010,0x000]
366 cmpl imm32[12] m32.ud[12] => eflags[0x044,0x044]
367 cmpl imm32[12] m32.ud[34] => eflags[0x044,0x000]
368 cmpl imm32[34] m32.ud[12] => eflags[0x081,0x081]
369 cmpl imm32[12] m32.ud[34] => eflags[0x081,0x000]
370 cmpl imm32[100] m32.sd[-2147483600] => eflags[0x800,0x800]
371 cmpl imm32[50] m32.sd[-50] => eflags[0x800,0x000]
372 cmpl imm32[-50] m32.sd[50] => eflags[0x800,0x000]
373 cmpl imm32[-100] m32.sd[2147483600] => eflags[0x800,0x800]
384 cmpl r32.ud[3] m32.ud[2] => eflags[0x010,0x010]
385 cmpl r32.ud[2] m32.ud[3] => eflags[0x010,0x000]
386 cmpl r32.ud[12] m32.ud[12] => eflags[0x044,0x044]
387 cmpl r32.ud[12] m32.ud[34] => eflags[0x044,0x000]
388 cmpl r32.ud[34] m32.ud[12] => eflags[0x081,0x081]
389 cmpl r32.ud[12] m32.ud[34] => eflags[0x081,0x000]
390 cmpl r32.ud[100] m32.sd[-2147483600] => eflags[0x800,0x800]
391 cmpl r32.ud[50] m32.sd[-50] => eflags[0x800,0x000]
392 cmpl r32.sd[-50] m32.sd[50] => eflags[0x800,0x000]
393 cmpl r32.sd[-100] m32.sd[2147483600] => eflags[0x800,0x800]
394 cmpl m32.ud[3] r32.ud[2] => eflags[0x010,0x010]
395 cmpl m32.ud[2] r32.ud[3] => eflags[0x010,0x000]
396 cmpl m32.ud[12] r32.ud[12] => eflags[0x044,0x044]
397 cmpl m32.ud[12] r32.ud[34] => eflags[0x044,0x000]
398 cmpl m32.ud[34] r32.ud[12] => eflags[0x081,0x081]
399 cmpl m32.ud[12] r32.ud[34] => eflags[0x081,0x000]
400 cmpl m32.ud[100] r32.sd[-2147483600] => eflags[0x800,0x800]
401 cmpl m32.ud[50] r32.sd[-50] => eflags[0x800,0x000]
402 cmpl m32.sd[-50] r32.sd[50] => eflags[0x800,0x000]
403 cmpl m32.sd[-100] r32.sd[2147483600] => eflags[0x800,0x800]
414 cmpxchgl eflags[0x40,0x00] eax.ud[1234] : r32.ud[5678] m32.ud[1234] => eflags[0x40,0x40] eax.ud[1234] 0.ud[5678] 1.ud[5678]
415 cmpxchgl eflags[0x40,0x40] eax.ud[1234] : r32.ud[5678] m32.ud[3456] => eflags[0x40,0x00] eax.ud[3456] 0.ud[5678] 1.ud[3456]
428 decl m32.ud[12345678] => 0.ud[12345677]
434 divl edx.ud[251958] eax.ud[673192206] : m32.ud[87654321] => eax.ud[12345678] edx.ud[20783136]
440 idivl edx.sd[251958] eax.sd[673192206] : m32.sd[-87654321] => eax.sd[-12345678] edx.sd[20783136]
446 imull eax.sd[12345678] : m32.sd[-12345678] => edx.sd[-35488] eax.sd[-260846532]
457 imull imm8[123] m32.ud[67890] r32.ud[0] => 2.ud[8350470]
460 imull imm32[12345] m32.ud[67890] r32.ud[0] => 2.ud[838102050]
462 imull m32.ud[12345] r32.ud[67890] => 1.ud[838102050]
468 incl m32.ud[12345678] => 0.ud[12345679]
482 movl imm32[12345678] m32.ud[0] => 1.ud[12345678]
484 movl r32.ud[12345678] m32.ud[0] => 1.ud[12345678]
485 movl m32.ud[12345678] r32.ud[0] => 1.ud[12345678]
503 mull eax.ud[12345678] : m32.ud[12345678] => edx.ud[35487] eax.ud[260846532]
509 negl m32.sd[-12345678] => 0.sd[12345678]
515 notl m32.ud[0xff00f0ca] => 0.ud[0x00ff0f35]
532 orl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
534 orl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x96767779]
535 orl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x96767779]
549 rcll eflags[0x1,0x0] : m32.ud[0xff00f0ca] => 0.ud[0xfe01e194] eflags[0x1,0x1]
551 rcll eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
553 rcll eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca7f] eflags[0x1,0x1]
567 rcrl eflags[0x1,0x1] : m32.ud[0xff00f0ca] => 0.ud[0xff807865] eflags[0x1,0x0]
569 rcrl eflags[0x1,0x0] : imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
571 rcrl eflags[0x1,0x0] : cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x94ff00f0] eflags[0x1,0x1]
585 roll m32.ud[0xff00f0ca] => 0.ud[0xfe01e195]
587 roll imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
589 roll cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0caff]
603 rorl m32.ud[0xff00f0ca] => 0.ud[0x7f807865]
605 rorl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
607 rorl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xcaff00f0]
623 sall m32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
625 sall imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
627 sall cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
641 sarl m32.ud[0xff00f0ca] => 0.ud[0xff807865]
643 sarl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
645 sarl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0xffff00f0]
678 sbbl eflags[0x1,0x0] : imm32[12345678] m32.ud[87654321] => 1.ud[75308643]
679 sbbl eflags[0x1,0x1] : imm32[12345678] m32.ud[87654321] => 1.ud[75308642]
682 sbbl eflags[0x1,0x0] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
683 sbbl eflags[0x1,0x1] : r32.ud[12345678] m32.ud[87654321] => 1.ud[75308642]
684 sbbl eflags[0x1,0x0] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
685 sbbl eflags[0x1,0x1] : m32.ud[12345678] r32.ud[87654321] => 1.ud[75308642]
891 shll m32.ud[0xff00f0ca] => 0.ud[0xfe01e194]
893 shll imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
895 shll cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00f0ca00]
909 shrl m32.ud[0xff00f0ca] => 0.ud[0x7f807865]
911 shrl imm8[8] m32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
913 shrl cl.ub[8] m32.ud[0xff00f0ca] => 1.ud[0x00ff00f0]
923 shldl imm8[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
925 shldl imm8[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
927 shldl cl.ub[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xfe01e195]
929 shldl cl.ub[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x00f0caff]
939 shrdl imm8[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x7f807865]
941 shrdl imm8[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
943 shrdl cl.ub[1] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0x7f807865]
945 shrdl cl.ub[8] r32.ud[0xff00f0ca] m32.ud[0xff00f0ca] => 2.ud[0xcaff00f0]
968 subl r32.ud[12345678] m32.ud[87654321] => 1.ud[75308643]
969 subl m32.ud[12345678] r32.ud[87654321] => 1.ud[75308643]
1030 testl imm32[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1031 testl imm32[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1032 testl imm32[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1033 testl imm32[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1034 testl imm32[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1040 testl r32.ud[0x1a1a1a1a] m32.ud[0x1a1a1a1a] => eflags[0x8c5,0x000]
1041 testl r32.ud[0x5a5a5a5a] m32.ud[0x5a5a5a5a] => eflags[0x8c5,0x004]
1042 testl r32.ud[0x1a1a1a1a] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x044]
1043 testl r32.ud[0xa1a1a1a1] m32.ud[0xa1a1a1a1] => eflags[0x8c5,0x080]
1044 testl r32.ud[0xa5a5a5a5] m32.ud[0xa5a5a5a5] => eflags[0x8c5,0x084]
1050 xaddl r32.ud[12345678] m32.ud[87654321] => 0.ud[87654321] 1.ud[99999999]
1062 xchgl r32.ud[12345678] m32.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1063 xchgl m32.ud[12345678] r32.ud[87654321] => 0.ud[87654321] 1.ud[12345678]
1080 xorl imm32[0x86427531] m32.ud[0x12345678] => 1.ud[0x94762349]
1082 xorl r32.ud[0x86427531] m32.ud[0x12345678] => 1.ud[0x94762349]
1083 xorl m32.ud[0x86427531] r32.ud[0x12345678] => 1.ud[0x94762349]
