Lines Matching refs:regT3
117 emitLoad(op2, regT3, regT2);
118 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
125 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
127 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
205 emitLoad(op2, regT3, regT2);
206 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
213 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
215 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
292 emitLoad(op2, regT3, regT2);
293 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
300 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
302 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
377 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
380 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
430 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
433 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
471 // op2 = regT3:regT2
477 Jump notInt = branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)); // op2 is not an int
544 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
546 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
585 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
587 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
626 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
628 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
819 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
821 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
928 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
930 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
1025 emitLoad(op2, regT3, regT2);
1027 Jump doubleOp2 = branch32(Below, regT3, TrustedImm32(JSValue::LowestTag));
1030 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
1099 addSlowCase(branch32(Above, regT3, TrustedImm32(JSValue::LowestTag)));
1159 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1161 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
1164 move(regT0, regT3);
1191 Jump negZero = branchOr32(Signed, regT2, regT3);
1241 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1244 notInt32Op2.append(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
1309 ASSERT(regT3 == X86Registers::ebx);
1319 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1321 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));
1327 move(regT0, regT3); // Save dividend payload, in case of 0.
1338 Jump storeResult2 = branchTest32(Zero, regT3, TrustedImm32(0x80000000)); // not negative
1380 emitLoad2(op1, regT1, regT0, op2, regT3, regT2);
1382 addSlowCase(branch32(NotEqual, regT3, TrustedImm32(JSValue::Int32Tag)));