Lines Matching refs:gp
190 struct wl1271_ini_general_params *gp = &(p->ini1271.general_params);
197 &gp->tx_bip_fem_auto_detect, 1);
200 &gp->tx_bip_fem_manufacturer, 1);
202 COMPARE_N_ADD("RefClk", l, val, &gp->ref_clock, 1);
204 COMPARE_N_ADD("SettlingTime", l, val, &gp->settling_time, 1);
207 &gp->clk_valid_on_wakeup, 1);
209 COMPARE_N_ADD("DC2DCMode", l, val, &gp->dc2dc_mode, 1);
212 &gp->dual_mode_select, 1);
215 cmn->dual_mode = gp->dual_mode_select;
217 else if (cmn->dual_mode != gp->dual_mode_select) {
222 COMPARE_N_ADD("Settings", l, val, &gp->general_settings, 1);
224 COMPARE_N_ADD("SRState", l, val, &gp->sr_state, 1);
227 gp->srf1, WL1271_INI_MAX_SMART_REFLEX_PARAM);
230 gp->srf2, WL1271_INI_MAX_SMART_REFLEX_PARAM);
233 gp->srf3, WL1271_INI_MAX_SMART_REFLEX_PARAM);
244 struct wl128x_ini_general_params *gp =
252 &gp->tx_bip_fem_auto_detect, 1);
255 &gp->tx_bip_fem_manufacturer, 1);
257 COMPARE_N_ADD("RefClk", l, val, &gp->ref_clock, 1);
259 COMPARE_N_ADD("SettlingTime", l, val, &gp->settling_time, 1);
262 &gp->clk_valid_on_wakeup, 1);
264 COMPARE_N_ADD("TCXO_Clk", l, val, &gp->tcxo_ref_clock, 1);
266 COMPARE_N_ADD("TCXO_SettlingTime", l, val, &gp->tcxo_settling_time, 1);
269 &gp->tcxo_valid_on_wakeup, 1);
272 &gp->tcxo_ldo_voltage, 1);
275 &gp->platform_conf, 1);
278 &gp->dual_mode_select, 1);
281 cmn->dual_mode = gp->dual_mode_select;
282 } else if (cmn->dual_mode != gp->dual_mode_select) {
288 gp->general_settings, WL128X_INI_MAX_SETTINGS_PARAM);
290 COMPARE_N_ADD("XTALItrimVal", l, val, &gp->xtal_itrim_val, 1);
292 COMPARE_N_ADD("SRState", l, val, &gp->sr_state, 1);
295 gp->srf1, WL1271_INI_MAX_SMART_REFLEX_PARAM);
298 gp->srf2, WL1271_INI_MAX_SMART_REFLEX_PARAM);
301 gp->srf3, WL1271_INI_MAX_SMART_REFLEX_PARAM);
311 struct wl1271_ini_band_params_2 *gp =
319 &gp->rx_trace_insertion_loss, 1);
322 &gp->tx_trace_loss, 1);
325 gp->rx_rssi_process_compens,
336 struct wl128x_ini_band_params_2 *gp = &(p->ini128x.stat_radio_params_2);
343 &gp->rx_trace_insertion_loss, 1);
346 gp->tx_trace_loss, WL1271_INI_CHANNEL_COUNT_2);
356 struct wl1271_ini_band_params_5 *gp =
364 gp->rx_trace_insertion_loss, 7);
367 gp->tx_trace_loss, 7);
370 gp->rx_rssi_process_compens,
381 struct wl128x_ini_band_params_5 *gp = &(p->ini128x.stat_radio_params_5);
388 gp->rx_trace_insertion_loss, 7);
391 gp->tx_trace_loss, 7);
401 struct wl1271_ini_fem_params_2 *gp =
409 &gp->tx_bip_ref_pd_voltage, 1);
412 &gp->tx_bip_ref_power, 1);
415 &gp->tx_bip_ref_offset, 1);
418 gp->tx_per_rate_pwr_limits_normal,
422 gp->tx_per_rate_pwr_limits_degraded,
426 gp->tx_per_rate_pwr_limits_extreme,
430 &gp->degraded_low_to_normal_thr, 1);
433 &gp->normal_to_degraded_high_thr, 1);
436 gp->tx_per_chan_pwr_limits_11b,
440 gp->tx_per_chan_pwr_limits_ofdm,
444 gp->tx_pd_vs_rate_offsets,
448 gp->tx_ibias,
452 &gp->rx_fem_insertion_loss, 1);
462 struct wl128x_ini_fem_params_2 *gp =
470 &gp->tx_bip_ref_pd_voltage, 1);
473 &gp->tx_bip_ref_power, 1);
476 &gp->tx_bip_ref_offset, 1);
479 gp->tx_per_rate_pwr_limits_normal,
483 gp->tx_per_rate_pwr_limits_degraded,
487 gp->tx_per_rate_pwr_limits_extreme,
491 &gp->degraded_low_to_normal_thr, 1);
494 &gp->normal_to_degraded_high_thr, 1);
497 gp->tx_per_chan_pwr_limits_11b,
501 gp->tx_per_chan_pwr_limits_ofdm,
505 gp->tx_pd_vs_rate_offsets,
509 gp->tx_pd_vs_chan_offsets,
513 gp->tx_pd_vs_temperature,
517 gp->tx_ibias,
521 &gp->rx_fem_insertion_loss, 1);
531 struct wl1271_ini_fem_params_2 *gp =
539 &gp->tx_bip_ref_pd_voltage, 1);
542 &gp->tx_bip_ref_power, 1);
545 &gp->tx_bip_ref_offset, 1);
548 gp->tx_per_rate_pwr_limits_normal,
552 gp->tx_per_rate_pwr_limits_degraded,
556 gp->tx_per_rate_pwr_limits_extreme,
560 &gp->degraded_low_to_normal_thr, 1);
563 &gp->normal_to_degraded_high_thr, 1);
566 gp->tx_per_chan_pwr_limits_11b,
570 gp->tx_per_chan_pwr_limits_ofdm,
574 gp->tx_pd_vs_rate_offsets,
578 gp->tx_ibias,
582 &gp->rx_fem_insertion_loss, 1);
592 struct wl128x_ini_fem_params_2 *gp =
600 &gp->tx_bip_ref_pd_voltage, 1);
603 &gp->tx_bip_ref_power, 1);
606 &gp->tx_bip_ref_offset, 1);
609 gp->tx_per_rate_pwr_limits_normal,
613 gp->tx_per_rate_pwr_limits_degraded,
617 gp->tx_per_rate_pwr_limits_extreme,
621 &gp->degraded_low_to_normal_thr, 1);
624 &gp->normal_to_degraded_high_thr, 1);
627 gp->tx_per_chan_pwr_limits_11b,
631 gp->tx_per_chan_pwr_limits_ofdm,
635 gp->tx_pd_vs_rate_offsets,
639 gp->tx_pd_vs_chan_offsets,
643 gp->tx_pd_vs_temperature,
647 gp->tx_ibias,
651 &gp->rx_fem_insertion_loss, 1);
661 struct wl1271_ini_fem_params_5 *gp =
669 gp->tx_bip_ref_pd_voltage, WL1271_INI_SUB_BAND_COUNT_5);
672 gp->tx_bip_ref_power, WL1271_INI_SUB_BAND_COUNT_5);
675 gp->tx_bip_ref_offset, WL1271_INI_SUB_BAND_COUNT_5);
678 gp->tx_per_rate_pwr_limits_normal,
682 gp->tx_per_rate_pwr_limits_degraded,
686 gp->tx_per_rate_pwr_limits_extreme,
690 &gp->degraded_low_to_normal_thr, 1);
693 &gp->normal_to_degraded_high_thr, 1);
696 gp->tx_per_chan_pwr_limits_ofdm,
700 gp->tx_pd_vs_rate_offsets,
704 gp->tx_ibias,
708 gp->rx_fem_insertion_loss, WL1271_INI_SUB_BAND_COUNT_5);
718 struct wl128x_ini_fem_params_5 *gp =
726 gp->tx_bip_ref_pd_voltage, WL1271_INI_SUB_BAND_COUNT_5);
729 gp->tx_bip_ref_power, WL1271_INI_SUB_BAND_COUNT_5);
732 gp->tx_bip_ref_offset, WL1271_INI_SUB_BAND_COUNT_5);
735 gp->tx_per_rate_pwr_limits_normal,
739 gp->tx_per_rate_pwr_limits_degraded,
743 gp->tx_per_rate_pwr_limits_extreme,
747 &gp->degraded_low_to_normal_thr, 1);
750 &gp->normal_to_degraded_high_thr, 1);
753 gp->tx_per_chan_pwr_limits_ofdm,
757 gp->tx_pd_vs_rate_offsets,
761 gp->tx_pd_vs_chan_offsets,
765 gp->tx_pd_vs_temperature,
769 gp->tx_ibias,
773 gp->rx_fem_insertion_loss, WL1271_INI_SUB_BAND_COUNT_5);
783 struct wl128x_ini *gp = &p->ini128x;
790 &gp->fem_vendor_and_options, 1);
