| /external/clang/test/CodeGen/ |
| 2003-09-18-BitfieldTests.c | 4 typedef struct BF {
8 } BF;
10 char *test1(BF *b) {
14 void test2(BF *b) { // Increment and decrement operators
19 void test3(BF *b) {
23 int test4(BF *b) {
27 void test5(BF *b, int i) { // array ref
|
| volatile.c | 22 struct { int x:3; } BF;
85 i=BF.x;
86 // CHECK: load i8* getelementptr {{.*}} @BF
155 BF.x=i;
157 // CHECK: load i8* getelementptr {{.*}} @BF
158 // CHECK: store i8 {{.*}}, i8* getelementptr {{.*}} @BF
|
| /external/clang/lib/Analysis/ |
| AnalysisDeclContext.cpp | 85 static BodyFarm *BF = new BodyFarm(C);
86 return *BF;
|
| /external/valgrind/main/none/tests/ppc32/ |
| test_dfp4.c | 88 * BF is the condition register bit field which can range from 0-7. But for
89 * testing purposes, we only use BF values of '0' and '5'.
91 static void _test_dtstdc(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
94 if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) {
95 fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM);
100 if (BF)
106 if (BF)
112 if (BF)
118 if (BF)
[all...] |
| test_dfp3.c | 165 static void _test_dcmpo(int BF, int x __attribute__((unused)))
167 if (BF < 0 || BF > 7) {
168 fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
171 switch (BF) {
201 static void _test_dcmpu(int BF, int x __attribute__((unused)))
203 if (BF < 0 || BF > 7) {
204 fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
207 switch (BF) {
[all...] |
| test_dfp5.c | 91 static void _test_dtstsf(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
99 switch (BF) {
110 fprintf(stderr, "Invalid value %d for BF\n", BF);
115 static void _test_dtstsfq(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
123 switch (BF) {
134 fprintf(stderr, "Invalid value %d for BF\n", BF);
540 int bf_idx, BF;
545 BF = BF_vals[bf_idx]
[all...] |
| /external/valgrind/main/none/tests/ppc64/ |
| test_dfp4.c | 88 * BF is the condition register bit field which can range from 0-7. But for
89 * testing purposes, we only use BF values of '0' and '5'.
91 static void _test_dtstdc(int BF, int DCM, dfp_val_t val1, dfp_val_t x1 __attribute__((unused)))
94 if (DCM < 0 || DCM > 5 || !(BF == 0 || BF == 5)) {
95 fprintf(stderr, "Invalid inputs to asm test: a=%d, b=%d\n", BF, DCM);
100 if (BF)
106 if (BF)
112 if (BF)
118 if (BF)
[all...] |
| test_dfp3.c | 165 static void _test_dcmpo(int BF, int x __attribute__((unused)))
167 if (BF < 0 || BF > 7) {
168 fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
171 switch (BF) {
201 static void _test_dcmpu(int BF, int x __attribute__((unused)))
203 if (BF < 0 || BF > 7) {
204 fprintf(stderr, "Invalid input to asm test: a=%d\n", BF);
207 switch (BF) {
[all...] |
| test_dfp5.c | 91 static void _test_dtstsf(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
99 switch (BF) {
110 fprintf(stderr, "Invalid value %d for BF\n", BF);
115 static void _test_dtstsfq(unsigned int BF, unsigned int ref_sig, dfp_val_t valB)
123 switch (BF) {
134 fprintf(stderr, "Invalid value %d for BF\n", BF);
540 int bf_idx, BF;
545 BF = BF_vals[bf_idx]
[all...] |
| /external/qemu/tcg/ppc/ |
| tcg-target.c | 410 #define BF(n) ((n)<<23)
580 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1));
583 tcg_out32 (s, CMP | BF (6) | RA (addr_reg2) | RB (r1));
779 tcg_out32 (s, CMP | BF (6) | RA (addr_reg2) | RB (r1));
1048 op |= BF (cr);
[all...] |
| /external/qemu/tcg/ppc64/ |
| tcg-target.c | 408 #define BF(n) ((n)<<23)
639 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L);
785 tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1) | CMP_L);
1034 op |= BF (cr) | (arch64 << 21);
[all...] |
| /external/qemu/ |
| ppc-dis.c | 286 example, in the optional BF field in the comparison instructions. The
494 /* The BF field in an X or XL form instruction. */
495 #define BF BDPA + 1
497 #define CRFD BF
500 /* The BF field in an X or XL form instruction. */
501 #define BFF BF + 1
504 /* An optional BF field. This is used for comparison instructions,
505 in which an omitted BF field is taken as zero. */
[all...] |
