| /external/llvm/lib/CodeGen/ |
| PHIEliminationUtils.cpp | 36 MachineRegisterInfo& MRI = MBB->getParent()->getRegInfo();
37 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(SrcReg),
38 RE = MRI.reg_end(); RI != RE; ++RI) {
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| CriticalAntiDepBreaker.h | 36 MachineRegisterInfo &MRI;
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| RegAllocBase.h | 62 MachineRegisterInfo *MRI;
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
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| DeadMachineInstructionElim.cpp | 33 const MachineRegisterInfo *MRI;
72 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
75 if (!MRI->use_nodbg_empty(Reg))
88 MRI = &MF.getRegInfo();
100 LivePhysRegs = MRI->getReservedRegs();
131 for (MachineRegisterInfo::use_iterator I = MRI->use_begin(Reg),
132 E = MRI->use_end(); I!=E; I=nextI) {
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| ProcessImplicitDefs.cpp | 30 MachineRegisterInfo *MRI;
84 MRI->use_nodbg_begin(Reg),
85 UE = MRI->use_nodbg_end(); UI != UE; ++UI) {
146 MRI = &MF.getRegInfo();
147 assert(MRI->isSSA() && "ProcessImplicitDefs only works on SSA form.");
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| AggressiveAntiDepBreaker.h | 119 MachineRegisterInfo &MRI;
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| LLVMTargetMachine.cpp | 163 const MCRegisterInfo &MRI = *getRegisterInfo();
179 MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI, STI,
198 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
270 const MCRegisterInfo &MRI = *getRegisterInfo();
272 MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
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| LiveRangeCalc.h | 38 const MachineRegisterInfo *MRI;
130 LiveRangeCalc() : MF(0), MRI(0), Indexes(0), DomTree(0), Alloc(0) {}
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| OptimizePHIs.cpp | 31 MachineRegisterInfo *MRI;
64 MRI = &Fn.getRegInfo();
102 MachineInstr *SrcMI = MRI->getVRegDef(SrcReg);
109 SrcMI = MRI->getVRegDef(SrcMI->getOperand(1).getReg());
142 for (MachineRegisterInfo::use_iterator I = MRI->use_begin(DstReg),
143 E = MRI->use_end(); I != E; ++I) {
168 if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
171 MRI->replaceRegWith(OldReg, SingleValReg);
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| UnreachableBlockElim.cpp | 200 MachineRegisterInfo &MRI = F.getRegInfo();
201 MRI.constrainRegClass(Input, MRI.getRegClass(Output));
202 MRI.replaceRegWith(Output, Input);
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| CalcSpillWeights.cpp | 47 MachineRegisterInfo &MRI = MF.getRegInfo();
49 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
51 if (MRI.reg_nodbg_empty(Reg))
61 const MachineRegisterInfo &mri) {
79 const TargetRegisterClass *rc = mri.getRegClass(reg);
111 MachineRegisterInfo &mri = MF.getRegInfo(); local
125 bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
130 for (MachineRegisterInfo::reg_iterator I = mri.reg_begin(li.reg);
162 unsigned hint = copyHint(mi, li.reg, tri, mri);
167 if (hweight > bestPhys && mri.isAllocatable(hint)
[all...] |
| MachineCopyPropagation.cpp | 37 MachineRegisterInfo *MRI;
162 if (!MRI->isReserved(Def) &&
163 (!MRI->isReserved(Src) || NoInterveningSideEffect(CopyMI, MI)) &&
275 if (MRI->isReserved(Reg) || !MaskMO.clobbersPhysReg(Reg))
312 if (!MRI->isReserved((*DI)->getOperand(0).getReg())) {
328 MRI = &MF.getRegInfo();
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| TargetRegisterInfo.cpp | 259 const MachineRegisterInfo &MRI = MF.getRegInfo();
260 std::pair<unsigned, unsigned> Hint = MRI.getRegAllocationHint(VirtReg);
275 if (MRI.isReserved(Phys))
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| /external/llvm/include/llvm/CodeGen/ |
| MachineSSAUpdater.h | 55 MachineRegisterInfo *MRI;
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| FastISel.h | 52 MachineRegisterInfo &MRI;
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| LiveRegMatrix.h | 42 MachineRegisterInfo *MRI;
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| LiveVariables.h | 113 MachineRegisterInfo &MRI);
132 MachineRegisterInfo* MRI;
284 return getVarInfo(Reg).isLiveIn(MBB, Reg, *MRI);
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| RegisterScavenging.h | 34 MachineRegisterInfo* MRI;
130 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
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| LiveRangeEdit.h | 60 MachineRegisterInfo &MRI;
109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
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| VirtRegMap.h | 41 MachineRegisterInfo *MRI;
85 MachineRegisterInfo &getRegInfo() const { return *MRI; }
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 31 MachineRegisterInfo *MRI;
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| /external/llvm/include/llvm/MC/ |
| MCInstPrinter.h | 34 const MCRegisterInfo &MRI;
49 const MCRegisterInfo &mri)
50 : CommentStream(0), MAI(mai), MII(mii), MRI(mri), AvailableFeatures(0),
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| /external/llvm/lib/MC/MCDisassembler/ |
| Disassembler.cpp | 54 const MCRegisterInfo *MRI = TheTarget->createMCRegInfo(Triple);
55 if (!MRI)
67 MCContext *Ctx = new MCContext(*MAI, *MRI, 0);
80 *MAI, *MII, *MRI, *STI);
86 TheTarget, MAI, MRI,
211 const MCRegisterInfo *MRI = DC->getRegisterInfo();
216 AsmPrinterVariant, *MAI, *MII, *MRI, *STI);
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| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 41 const MCRegisterInfo &MRI;
52 SIMCCodeEmitter(const MCInstrInfo &mcii, const MCRegisterInfo &mri,
54 : MCII(mcii), MRI(mri), STI(sti), Ctx(ctx) { }
70 const MCRegisterInfo &MRI,
73 return new SIMCCodeEmitter(MCII, MRI, STI, Ctx);
175 return MRI.getEncodingValue(MO.getReg());
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| /frameworks/compile/mclinker/lib/CodeGen/ |
| MCLDTargetMachine.cpp | 280 const MCRegisterInfo &MRI = *getTM().getRegisterInfo();
291 MCE = getTarget().get()->createMCCodeEmitter(MII, MRI, STI, *Context);
325 const MCRegisterInfo &MRI = *getTM().getRegisterInfo();
328 getTarget().get()->createMCCodeEmitter(MII, MRI, STI, *Context);
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