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    Searched defs:Op5 (Results 1 - 2 of 2) sorted by null

  /external/llvm/lib/Target/XCore/Disassembler/
XCoreDisassembler.cpp 643 unsigned Op1, Op2, Op3, Op4, Op5, Op6;
648 S = Decode3OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5, Op6);
655 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder);
677 unsigned Op1, Op2, Op3, Op4, Op5;
682 S = Decode2OpInstruction(fieldFromInstruction(Insn, 16, 16), Op4, Op5);
690 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder);
  /external/llvm/lib/Target/ARM/
ARMISelLowering.cpp     [all...]

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