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    Searched defs:RegUnits (Results 1 - 5 of 5) sorted by null

  /external/llvm/lib/CodeGen/
InterferenceCache.h 86 /// more than 4 RegUnits.
87 SmallVector<RegUnitInfo, 4> RegUnits;
  /external/llvm/include/llvm/MC/
MCRegisterInfo.h 122 // RegUnits - Points to the list of register units. The low 4 bits holds the
124 uint32_t RegUnits;
158 unsigned NumRegUnits; // Number of regunits.
482 assert(Reg && "Null register has no regunits");
483 // Decode the RegUnits MCRegisterDesc field.
484 unsigned RU = MCRI->get(Reg).RegUnits;
  /external/llvm/utils/TableGen/
RegisterInfoEmitter.cpp 177 std::vector<unsigned> RegUnits;
178 RC.buildRegUnitSet(RegUnits);
180 << ", " << RegBank.getRegUnitSetWeight(RegUnits);
240 const RegUnitSet &RegUnits = RegBank.getRegPressureSet(i);
241 OS << " " << RegBank.getRegUnitSetWeight(RegUnits.Units)
242 << ", \t// " << i << ": " << RegUnits.Name << "\n";
830 assert(!Roots.empty() && "All regunits must have a root register.");
    [all...]
CodeGenRegisters.h 174 const RegUnitList &getRegUnits() const { return RegUnits; }
178 return makeArrayRef(RegUnits).slice(0, NumNativeRegUnits);
182 // Return true if the RegUnits changed.
187 void adoptRegUnit(unsigned RUID) { RegUnits.push_back(RUID); }
225 RegUnitList RegUnits;
353 void buildRegUnitSet(std::vector<unsigned> &RegUnits) const;
454 SmallVector<RegUnit, 8> RegUnits;
562 RegUnits.resize(RegUnits.size() + 1);
563 RegUnits.back().Roots[0] = R0
    [all...]
CodeGenRegisters.cpp 198 // Return true of this unit appears in RegUnits.
199 static bool hasRegUnit(CodeGenRegister::RegUnitList &RegUnits, unsigned Unit) {
200 return std::count(RegUnits.begin(), RegUnits.end(), Unit);
204 // Return true if the RegUnits changed.
206 unsigned OldNumUnits = RegUnits.size();
210 // Merge the subregister's units into this register's RegUnits.
211 mergeRegUnits(RegUnits, SR->RegUnits);
213 return OldNumUnits != RegUnits.size()
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