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Searched
refs:AMDGPUInstrInfo
(Results
1 - 10
of
10
) sorted by null
/external/llvm/lib/Target/R600/
AMDGPUInstrInfo.cpp
1
//===--
AMDGPUInstrInfo
.cpp - Base class for AMD GPU InstrInfo ------------===//
16
#include "
AMDGPUInstrInfo
.h"
30
AMDGPUInstrInfo
::
AMDGPUInstrInfo
(TargetMachine &tm)
33
const AMDGPURegisterInfo &
AMDGPUInstrInfo
::getRegisterInfo() const {
37
bool
AMDGPUInstrInfo
::isCoalescableExtInstr(const MachineInstr &MI,
44
unsigned
AMDGPUInstrInfo
::isLoadFromStackSlot(const MachineInstr *MI,
50
unsigned
AMDGPUInstrInfo
::isLoadFromStackSlotPostFE(const MachineInstr *MI,
56
bool
AMDGPUInstrInfo
::hasLoadFromStackSlot(const MachineInstr *MI,
62
unsigned
AMDGPUInstrInfo
::isStoreFromStackSlot(const MachineInstr *MI
[
all
...]
AMDGPUConvertToISA.cpp
17
#include "
AMDGPUInstrInfo
.h"
49
const
AMDGPUInstrInfo
* TII =
50
static_cast<const
AMDGPUInstrInfo
*>(TM.getInstrInfo());
AMDGPUTargetMachine.h
19
#include "
AMDGPUInstrInfo
.h"
36
const
AMDGPUInstrInfo
* InstrInfo;
53
virtual const
AMDGPUInstrInfo
*getInstrInfo() const {return InstrInfo;}
SIInstrInfo.h
19
#include "
AMDGPUInstrInfo
.h"
24
class SIInstrInfo : public
AMDGPUInstrInfo
{
AMDGPUInstrInfo.h
1
//===--
AMDGPUInstrInfo
.h - AMDGPU Instruction Information ------*- C++ -*-===//
19
#include "
AMDGPUInstrInfo
.h"
40
class
AMDGPUInstrInfo
: public AMDGPUGenInstrInfo {
48
explicit
AMDGPUInstrInfo
(TargetMachine &tm);
R600InstrInfo.h
18
#include "
AMDGPUInstrInfo
.h"
33
class R600InstrInfo : public
AMDGPUInstrInfo
{
AMDGPUIndirectAddressing.cpp
35
const
AMDGPUInstrInfo
*TII;
42
TII(static_cast<const
AMDGPUInstrInfo
*>(tm.getInstrInfo()))
SIInstrInfo.cpp
26
:
AMDGPUInstrInfo
(tm),
AMDILCFGStructurizer.cpp
14
#include "
AMDGPUInstrInfo
.h"
[
all
...]
R600InstrInfo.cpp
31
:
AMDGPUInstrInfo
(tm),
420
return
AMDGPUInstrInfo
::isPredicable(MI);
Completed in 352 milliseconds