| /external/v8/src/arm/ |
| constants-arm.h | 181 // Instr is merely used by the Assembler to distinguish 32bit integers
182 // representing instructions from usual 32 bit values.
183 // Instruction objects are pointers to 32bit values, and provide methods to
205 BIC = 14 << 21, // Bit Clear.
210 // The bits for bit 7-4 for some type 0 miscellaneous instructions.
257 // Instruction bit masks.
319 // Bit encoding P U W.
331 // Bit encoding P U W .
363 // svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for
364 // standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature
[all...] |
| constants-arm.cc | 48 high16 |= (0xff * Bit(18)) << 6; // xxbbbbbb,bbxxxxxx.
49 high16 |= (Bit(18) ^ 1) << 14; // xBxxxxxx,xxxxxxxx.
50 high16 |= Bit(19) << 15; // axxxxxxx,xxxxxxxx.
|
| disasm-arm.cc | 120 // Each of these functions decodes one particular instruction type, a 3-bit
261 shift_names[instr->Bit(6) * 2],
350 // Print register list in ascending order, by scanning the bit mask.
429 if (instr->Bit(21) == 0) {
456 if (instr->Bit(21) == 0) {
458 // Bits 20-16 represent most-significant bit. Covert to width.
506 if ((instr->Bits(27, 25) == 0) && (instr->Bit(20) == 0) &&
507 (instr->Bits(7, 6) == 3) && (instr->Bit(4) == 1)) {
508 if (instr->Bit(5) == 1) {
529 // 'off12: 12-bit offset for load and store instruction
[all...] |
| simulator-arm.cc | [all...] |
| /external/chromium/third_party/libjingle/source/talk/site_scons/site_tools/ |
| talk_noops.py | 13 if not env.Bit('windows'):
|
| /external/chromium/third_party/libjingle/source/talk/site_scons/ |
| talk.py | 189 if env.Bit('windows'):
194 elif env.Bit('mac'):
196 elif env.Bit('linux'):
206 if env.Bit('windows'):
207 if env.Bit('debug'):
211 elif env.Bit('mac'):
213 elif env.Bit('linux'):
249 if env.Bit('windows'):
257 if env.Bit('mac'):
331 platforms[x] for x in iter(platforms) if env.Bit(x
[all...] |
| /external/clang/test/Parser/ |
| MicrosoftExtensions.c | 21 void __forceinline InterlockedBitTestAndSet (long *Base, long Bit)
26 mov eax, Bit
|
| /external/llvm/lib/TableGen/ |
| TGLexer.h | 46 Bit, Bits, Class, Code, Dag, Def, Foreach, Defm, Field, In, Int, Let, List,
|
| Record.cpp | 104 if (BI->getNumBits() != 1) return 0; // Only accept if just one bit!
110 if (Val != 0 && Val != 1) return 0; // Only accept 0 or 1 for a bit!
118 return VI; // Accept variable if it is already of bit type!
154 if (Size != 1) return 0; // Can only convert single bit.
219 if (BitInit *Bit = dyn_cast<BitInit>(BI->getBit(i))) {
220 Result |= Bit->getValue() << i;
495 if (Init *Bit = getBit(e-i-1))
496 Result += Bit->getAsString();
503 // Fix bit initializer to preserve the behavior that bit reference from a unse
[all...] |
| TGParser.cpp | 113 return Error(Loc, "Initializer is not compatible with bit range");
124 unsigned Bit = BitList[i];
125 if (NewBits[Bit])
126 return Error(Loc, "Cannot set bit #" + utostr(Bit) + " of value '" +
128 NewBits[Bit] = BInit->getBit(i);
556 /// ParseRangePiece - Parse a bit/value range.
643 /// ParseOptionalBitList - Parse either a bit list in {}'s or nothing.
658 TokError("expected '}' at end of bit list");
670 /// Type ::= BIT // bit typ
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | 141 /// BitRecTy - 'bit' - Represent a single bit
169 virtual std::string getAsString() const { return "bit"; }
427 /// We could pack these a bit tighter by not having the IK_FirstXXXInit
495 /// the bit subscript operator on this initializer, return null.
537 /// bit.
538 virtual Init *getBit(unsigned Bit) const = 0;
540 /// getBitVar - This method is used to retrieve the initializer for bit
544 /// getBitNum - This method is used to retrieve the bit number of a bit
[all...] |
| /external/llvm/include/llvm/Support/ |
| CommandLine.h | [all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 149 /// isDisp8 - Return true if this signed displacement fits in a 8-bit
165 /// a 32-bit memory operand. Op specifies the operand # of the memoperand.
179 /// a 64-bit memory operand. Op specifies the operand # of the memoperand.
195 /// a 16-bit memory operand. Op specifies the operand # of the memoperand.
311 assert(is64BitMode() && "Rip-relative addressing requires 64-bit mode");
348 // If there is no base register and we're in 64-bit mode, we need a SIB
405 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
454 // 1: Same as REX_R=0 (must be 1 in 32-bit mode)
455 // 0: Same as REX_R=1 (64 bit mode only)
462 // 1: Same as REX.X=0 (must be 1 in 32-bit mode
[all...] |
| /external/llvm/utils/TableGen/ |
| InstrInfoEmitter.cpp | 351 if (BitInit *Bit = dyn_cast<BitInit>(TSF->getBit(i)))
352 Value |= uint64_t(Bit->getValue()) << i;
354 PrintFatalError("Invalid TSFlags bit in " + Inst.TheDef->getName());
|
| CodeGenRegisters.cpp | [all...] |
| /external/chromium/third_party/libjingle/source/talk/ |
| main.scons | 67 # Detect if running on 64 bit or 32 bit host.
68 DeclareBit('platform_arch_64bit', 'Host Platform is 64 Bit')
69 if platform.architecture()[0] == "64bit":
175 if win_env.Bit('test_signing'):
429 # TODO(): Clone linux envs for 64bit. See 'variant' documentation.
449 if win_env.Bit('vsproj'):
|
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 165 /// REX prefix which specifies 1) 64-bit instructions, 2) non-default operand
212 unsigned Bit = 0;
218 REX |= 1 << Bit;
219 Bit++;
233 unsigned Bit = 0;
238 REX |= 1 << Bit;
239 Bit++;
399 /// isDisp8 - Return true if this signed displacement fits in a 8-bit
408 // mechanism as 32-bit mode.
436 // In 64-bit static small code model, we could potentially emit absolute
[all...] |
| /external/llvm/lib/MC/ |
| MCAsmStreamer.cpp | 685 // If the target doesn't support 64-bit data, emit as two 32-bit halves.
[all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 233 // Instruction bit masks.
612 // Read one particular bit out of the instruction bits.
613 inline int Bit(int nr) const {
617 // Read a bit field out of the instruction bits.
690 // Float Branch true/false instruction bit.
|
| simulator-mips.cc | [all...] |
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssembler.cpp | 443 #pragma mark Bit manipulation (ARMv7+ only)...
446 // Bit manipulation (ARMv7+ only)...
|
| /build/core/ |
| config.mk | 350 # Is the host JDK 64-bit version?
352 ifneq ($(filter 64-Bit, $(shell java -version 2>&1)),)
|
| /external/antlr/antlr-3.4/runtime/Delphi/Sources/Antlr3.Runtime/ |
| Antlr.Runtime.pas | 201 /// better to be 32-bit clean and be consistent with LA.
448 /// <param name="bit">element that must fit in set
450 procedure GrowToInclude(const Bit: Integer);
[all...] |
