| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.h | 1 //===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===//
11 /// \brief R600 DAG Lowering interface definition
29 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
33 SelectionDAG &DAG) const;
39 DebugLoc DL, SelectionDAG &DAG,
49 SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT,
56 SDValue LowerROTL(SDValue Op, SelectionDAG &DAG) const;
58 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
59 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
60 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const
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| AMDGPUISelLowering.h | 27 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
28 SDValue LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const;
32 /// \brief Helper function that adds Reg to the LiveIn list of the DAG's
36 SDValue CreateLiveInRegister(SelectionDAG &DAG, const TargetRegisterClass *RC,
52 DebugLoc DL, SelectionDAG &DAG) const;
59 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
60 SDValue LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const;
61 SDValue LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const;
62 SDValue LowerMinMax(SDValue Op, SelectionDAG &DAG) const;
65 virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const
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| AMDGPUISelLowering.cpp | 1 //===-- AMDGPUISelLowering.cpp - AMDGPU Common DAG lowering functions -----===//
84 DebugLoc DL, SelectionDAG &DAG) const {
85 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
92 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
100 // AMDIL DAG lowering
101 case ISD::SDIV: return LowerSDIV(Op, DAG);
102 case ISD::SREM: return LowerSREM(Op, DAG);
103 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG);
104 case ISD::BRCOND: return LowerBRCOND(Op, DAG);
105 // AMDGPU DAG lowerin
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| SIISelLowering.h | 1 //===-- SIISelLowering.h - SI DAG Lowering Interface ------------*- C++ -*-===//
11 /// \brief SI DAG Lowering interface definition
30 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
31 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
35 bool fitsRegClass(SelectionDAG &DAG, SDValue &Op, unsigned RegClass) const;
36 void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
45 DebugLoc DL, SelectionDAG &DAG,
52 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
54 virtual SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const;
|
| AMDILISelLowering.cpp | 1 //===-- AMDILISelLowering.cpp - AMDIL DAG Lowering Implementation ---------===//
253 // be zero. Op is expected to be a target specific node. Used by DAG
261 const SelectionDAG &DAG,
269 DAG.ComputeMaskedBits(
275 DAG.ComputeMaskedBits(
296 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const {
300 DST = LowerSDIV64(Op, DAG);
302 DST = LowerSDIV32(Op, DAG);
305 DST = LowerSDIV24(Op, DAG);
313 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const
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| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 30 X86SelectionDAGInfo::EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
57 Type *IntPtrTy = getDataLayout()->getIntPtrType(*DAG.getContext());
66 CallLoweringInfo CLI(Chain, Type::getVoidTy(*DAG.getContext()),
70 DAG.getExternalSymbol(bzeroEntry, IntPtr), Args,
71 DAG, dl);
113 Count = DAG.getIntPtrConstant(SizeVal);
119 Count = DAG.getIntPtrConstant(SizeVal / UBytes);
123 Chain = DAG.getCopyToReg(Chain, dl, ValReg, DAG.getConstant(Val, AVT),
128 Count = DAG.getIntPtrConstant(SizeVal)
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| X86ISelLowering.h | 1 //===-- X86ISelLowering.h - X86 DAG Lowering Interface ----------*- C++ -*-===//
11 // selection DAG.
29 // X86 Specific DAG Nodes
484 SelectionDAG &DAG) const;
526 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
532 SelectionDAG &DAG) const;
555 /// DAG node.
567 const SelectionDAG &DAG,
578 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
598 SelectionDAG &DAG) const
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 1 //===-- HexagonISelLowering.h - Hexagon DAG Lowering Interface --*- C++ -*-===//
11 // selection DAG.
92 SelectionDAG& DAG) const;
97 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
100 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
101 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
102 SDValue LowerINLINEASM(SDValue Op, SelectionDAG &DAG) const;
103 SDValue LowerEH_LABEL(SDValue Op, SelectionDAG &DAG) const;
107 DebugLoc dl, SelectionDAG &DAG,
109 SDValue LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const
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| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 1 //===-- PPCISelLowering.h - PPC32 DAG Lowering Interface --------*- C++ -*-===//
11 // selection DAG.
319 SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG);
329 /// DAG node.
343 SelectionDAG &DAG) const;
349 SelectionDAG &DAG) const;
355 SelectionDAG &DAG) const;
360 SelectionDAG &DAG) const;
366 SelectionDAG &DAG) const;
372 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 1 //===-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
79 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
82 /// DAG node.
85 SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
88 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
89 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
90 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const
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| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 1 //===-- SparcISelLowering.cpp - Sparc DAG Lowering Implementation ---------===//
11 // selection DAG.
84 DebugLoc dl, SelectionDAG &DAG) const {
86 MachineFunction &MF = DAG.getMachineFunction();
92 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
93 DAG.getTarget(), RVLocs, *DAG.getContext());
108 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
113 RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT()));
123 SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy())
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| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 1 //==-- AArch64ISelLowering.h - AArch64 DAG Lowering Interface ----*- C++ -*-==//
11 // selection DAG.
49 // load instruction. This prevents the DAG combiner folding a truncate to
64 /// these are pre-encoded since DAG matching can't cope with combining LSB
101 /// these are pre-encoded since DAG matching can't cope with combining LSB
128 DebugLoc dl, SelectionDAG &DAG,
135 DebugLoc dl, SelectionDAG &DAG) const;
143 DebugLoc dl, SelectionDAG &DAG,
146 void SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG,
161 SelectionDAG& DAG) const
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| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
90 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
96 SelectionDAG &DAG) const;
99 // DAG node.
118 DebugLoc dl, SelectionDAG &DAG,
126 DebugLoc dl, SelectionDAG &DAG,
131 DebugLoc dl, SelectionDAG &DAG,
133 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
135 SelectionDAG &DAG) const
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| XCoreISelLowering.cpp | 1 //===-- XCoreISelLowering.cpp - XCore DAG Lowering Implementation ---------===//
163 // We have target-specific dag combine patterns for the following nodes:
171 LowerOperation(SDValue Op, SelectionDAG &DAG) const {
174 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
175 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
176 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
177 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
178 case ISD::BR_JT: return LowerBR_JT(Op, DAG);
179 case ISD::LOAD: return LowerLOAD(Op, DAG);
180 case ISD::STORE: return LowerSTORE(Op, DAG);
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| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.cpp | 29 ARMSelectionDAGInfo::EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
66 Loads[i] = DAG.getLoad(VT, dl, Chain,
67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src,
68 DAG.getConstant(SrcOff, MVT::i32)),
74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
78 TFOps[i] = DAG.getStore(Chain, dl, Loads[i],
79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst,
80 DAG.getConstant(DstOff, MVT::i32)),
85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i);
105 Loads[i] = DAG.getLoad(VT, dl, Chain
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| ARMISelLowering.h | 1 //===-- ARMISelLowering.h - ARM DAG Lowering Interface ----------*- C++ -*-===//
11 // selection DAG.
31 // ARM Specific DAG Nodes
257 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
263 SelectionDAG &DAG) const;
282 SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const;
324 SelectionDAG &DAG) const;
332 SelectionDAG &DAG) const;
337 const SelectionDAG &DAG,
361 SelectionDAG &DAG) const
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.h | 1 //===-- NVPTXISelLowering.h - NVPTX DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
80 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
84 SelectionDAG &DAG) const;
116 SelectionDAG &DAG,
130 SelectionDAG &DAG) const;
134 SelectionDAG &DAG) const;
148 SDValue getExtSymb(SelectionDAG &DAG, const char *name, int idx, EVT =
150 SDValue getParamSymbol(SelectionDAG &DAG, int idx, EVT = MVT::i32) const
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 36 SelectionDAG& DAG;
83 VectorLegalizer(SelectionDAG& dag) :
84 DAG(dag), TLI(dag.getTargetLoweringInfo()), Changed(false) {}
90 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
91 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I) {
113 DAG.AssignTopologicalOrder();
114 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
115 E = prior(DAG.allnodes_end()); I != llvm::next(E); ++I
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| LegalizeIntegerTypes.cpp | 36 DEBUG(dbgs() << "Promote integer result: "; N->dump(&DAG); dbgs() << "\n");
47 N->dump(&DAG); dbgs() << "\n";
156 return DAG.getNode(ISD::AssertSext, N->getDebugLoc(),
163 return DAG.getNode(ISD::AssertZext, N->getDebugLoc(),
168 EVT ResVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
169 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
182 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
196 SDValue Res = DAG.getAtomic(N->getOpcode(), N->getDebugLoc(),
209 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT);
211 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT)
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| LegalizeDAG.cpp | 53 SelectionDAG &DAG;
64 explicit SelectionDAGLegalize(SelectionDAG &DAG);
159 DAG.RemoveDeadNode(N);
165 DAG.ReplaceAllUsesWith(Old, New);
169 DAG.ReplaceAllUsesWith(Old, New);
173 DAG.ReplaceAllUsesWith(Old, New);
194 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]);
208 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]);
211 SelectionDAGLegalize::SelectionDAGLegalize(SelectionDAG &dag)
212 : SelectionDAG::DAGUpdateListener(dag),
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| LegalizeVectorTypes.cpp | 35 N->dump(&DAG);
43 N->dump(&DAG);
131 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
139 return DAG.getNode(N->getOpcode(), N->getDebugLoc(),
151 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(),
161 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), EltVT, InOp);
168 return DAG.getConvertRndSat(NewVT, N->getDebugLoc(),
169 Op0, DAG.getValueType(NewVT),
170 DAG.getValueType(Op0.getValueType()),
177 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc()
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| LegalizeTypesGeneric.cpp | 41 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT);
54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo);
75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
80 EVT InNVT = EVT::getVectorVT(*DAG.getContext(), InVT.getVectorElementType()
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| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 1 //===-- MipsISelLowering.cpp - Mips DAG Lowering Implementation -----------===//
11 // selection DAG.
73 SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const {
74 MipsFunctionInfo *FI = DAG.getMachineFunction().getInfo<MipsFunctionInfo>();
75 return DAG.getRegister(FI->getGlobalBaseReg(), Ty);
78 static SDValue getTargetNode(SDValue Op, SelectionDAG &DAG, unsigned Flag) {
82 return DAG.getTargetGlobalAddress(N->getGlobal(), Op.getDebugLoc(), Ty, 0,
85 return DAG.getTargetExternalSymbol(N->getSymbol(), Ty, Flag);
87 return DAG.getTargetBlockAddress(N->getBlockAddress(), Ty, 0, Flag);
89 return DAG.getTargetJumpTable(N->getIndex(), Ty, Flag)
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| MipsISelLowering.h | 1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
11 // selection DAG.
161 SelectionDAG &DAG) const;
164 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
170 SelectionDAG &DAG) const;
173 // DAG node.
191 SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
193 SDValue getAddrLocal(SDValue Op, SelectionDAG &DAG, bool HasMips64) const;
195 SDValue getAddrGlobal(SDValue Op, SelectionDAG &DAG, unsigned Flag) const;
197 SDValue getAddrGlobalLargeGOT(SDValue Op, SelectionDAG &DAG,
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| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 1 //===-- MBlazeISelLowering.h - MBlaze DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
101 // DAG node.
116 DebugLoc dl, SelectionDAG &DAG,
120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
[all...] |
