/external/llvm/lib/Target/Sparc/ |
SparcRegisterInfo.cpp | 61 int SPAdj, unsigned FIOperandNum, 67 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 72 MI.getOperand(FIOperandNum + 1).getImm(); 78 MI.getOperand(FIOperandNum).ChangeToRegister(SP::I6, false); 79 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); 89 MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false); 90 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset & ((1 << 10)-1));
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SparcRegisterInfo.h | 40 int SPAdj, unsigned FIOperandNum,
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/external/llvm/lib/Target/NVPTX/ |
NVPTXRegisterInfo.cpp | 124 int SPAdj, unsigned FIOperandNum, 129 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 133 MI.getOperand(FIOperandNum+1).getImm(); 136 MI.getOperand(FIOperandNum).ChangeToRegister(NVPTX::VRFrame, false); 137 MI.getOperand(FIOperandNum+1).ChangeToImmediate(Offset);
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NVPTXRegisterInfo.h | 58 int SPAdj, unsigned FIOperandNum,
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/external/llvm/lib/Target/Hexagon/ |
HexagonRegisterInfo.cpp | 121 int SPAdj, unsigned FIOperandNum, 128 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 148 MI.getOperand(FIOperandNum).ChangeToRegister(getStackRegister(), false, 150 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(FrameSize+Offset); 187 MI.getOperand(FIOperandNum).ChangeToRegister(dstReg, false, false,true); 188 MI.getOperand(FIOperandNum+1).ChangeToImmediate(0); 215 MI.getOperand(FIOperandNum).ChangeToRegister(resReg, false, false,true); 216 MI.getOperand(FIOperandNum+1).ChangeToImmediate(0); 221 MI.getOperand(FIOperandNum).ChangeToRegister(getStackRegister(), 223 MI.getOperand(FIOperandNum+1).ChangeToImmediate(FrameSize+Offset) [all...] |
HexagonRegisterInfo.h | 60 int SPAdj, unsigned FIOperandNum,
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/external/llvm/lib/Target/AArch64/ |
AArch64RegisterInfo.cpp | 83 unsigned FIOperandNum, 107 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 115 Offset += MI.getOperand(FIOperandNum + 1).getImm(); 120 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, /*isDef=*/ false); 121 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); 151 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, true); 152 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset / OffsetScale);
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AArch64RegisterInfo.h | 44 unsigned FIOperandNum,
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/external/llvm/lib/Target/MBlaze/ |
MBlazeRegisterInfo.h | 55 int SPAdj, unsigned FIOperandNum,
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MBlazeRegisterInfo.cpp | 91 unsigned FIOperandNum, RegScavenger *RS) const { 95 unsigned OFIOperandNum = FIOperandNum == 2 ? 1 : 2; 100 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 121 MI.getOperand(FIOperandNum).ChangeToRegister(getFrameRegister(MF), false);
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/external/llvm/lib/Target/MSP430/ |
MSP430RegisterInfo.h | 46 int SPAdj, unsigned FIOperandNum,
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MSP430RegisterInfo.cpp | 106 int SPAdj, unsigned FIOperandNum, 115 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 129 Offset += MI.getOperand(FIOperandNum + 1).getImm(); 137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 155 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
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/external/llvm/lib/Target/R600/ |
AMDGPURegisterInfo.h | 56 unsigned FIOperandNum,
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AMDGPURegisterInfo.cpp | 41 unsigned FIOperandNum,
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/external/llvm/lib/Target/ARM/ |
Thumb1RegisterInfo.h | 60 int SPAdj, unsigned FIOperandNum,
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ARMBaseRegisterInfo.cpp | 663 int SPAdj, unsigned FIOperandNum, 673 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 695 MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false /*isDef*/); 696 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); 703 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII); 706 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII); 726 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false); 738 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false,true);
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ARMBaseRegisterInfo.h | 172 int SPAdj, unsigned FIOperandNum,
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/external/llvm/lib/Target/Mips/ |
MipsRegisterInfo.h | 58 int SPAdj, unsigned FIOperandNum,
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MipsRegisterInfo.cpp | 180 unsigned FIOperandNum, RegScavenger *RS) const { 187 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 195 eliminateFI(MI, FIOperandNum, FrameIndex, stackSize, spOffset);
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/external/llvm/lib/Target/XCore/ |
XCoreRegisterInfo.h | 58 int SPAdj, unsigned FIOperandNum,
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XCoreRegisterInfo.cpp | 106 int SPAdj, unsigned FIOperandNum, 111 MachineOperand &FrameOp = MI.getOperand(FIOperandNum); 135 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/); 136 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); 141 Offset += MI.getOperand(FIOperandNum + 1).getImm(); 142 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
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/external/llvm/lib/Target/PowerPC/ |
PPCRegisterInfo.h | 72 int SPAdj, unsigned FIOperandNum,
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PPCRegisterInfo.cpp | 379 int SPAdj, unsigned FIOperandNum, 395 unsigned OffsetOperandNo = (FIOperandNum == 2) ? 1 : 2; 397 OffsetOperandNo = FIOperandNum-1; 400 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 428 MI.getOperand(FIOperandNum).ChangeToRegister(TFI->hasFP(MF) ? 527 unsigned StackReg = MI.getOperand(FIOperandNum).getReg();
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/external/llvm/lib/Target/X86/ |
X86RegisterInfo.h | 121 int SPAdj, unsigned FIOperandNum,
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/external/llvm/lib/CodeGen/ |
RegisterScavenging.cpp | 378 unsigned FIOperandNum = getFrameIndexOperandNum(II); 379 TRI->eliminateFrameIndex(II, SPAdj, FIOperandNum, this); 385 FIOperandNum = getFrameIndexOperandNum(II); 386 TRI->eliminateFrameIndex(II, SPAdj, FIOperandNum, this);
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