| /dalvik/vm/compiler/codegen/ |
| Optimizer.h | 37 struct LIR;
40 struct LIR *head,
41 struct LIR *tail);
|
| Ralloc.h | 111 * Mark the beginning and end LIR of a def sequence. Note that
112 * on entry start points to the LIR prior to the beginning of the
116 LIR *start, LIR *finish);
118 * Mark the beginning and end LIR of a def sequence. Note that
119 * on entry start points to the LIR prior to the beginning of the
123 LIR *start, LIR *finish);
|
| CodegenFactory.cpp | 139 LIR *defStart;
140 LIR *defEnd;
175 defStart = (LIR *)cUnit->lastLIRInsn;
179 defEnd = (LIR *)cUnit->lastLIRInsn;
210 LIR *defStart;
211 LIR *defEnd;
256 defStart = (LIR *)cUnit->lastLIRInsn;
264 defEnd = (LIR *)cUnit->lastLIRInsn;
|
| RallocUtil.cpp | 444 static void nullifyRange(CompilationUnit *cUnit, LIR *start, LIR *finish,
448 LIR *p;
459 * Mark the beginning and end LIR of a def sequence. Note that
460 * on entry start points to the LIR prior to the beginning of the
464 LIR *start, LIR *finish)
475 * Mark the beginning and end LIR of a def sequence. Note that
476 * on entry start points to the LIR prior to the beginning of the
480 LIR *start, LIR *finish
[all...] |
| /dalvik/vm/compiler/ |
| Loop.h | 32 LIR *branchToBody; // branch over to the body from entry
33 LIR *branchToPCR; // branch over to the PCR cell
|
| CompilerIR.h | 81 typedef struct LIR {
83 struct LIR *next;
84 struct LIR *prev;
85 struct LIR *target;
86 } LIR;
125 LIR *misPredBranchOver;
209 LIR *firstLIRInsn;
210 LIR *lastLIRInsn;
211 LIR *literalList; // Constants
212 LIR *classPointerList; // Relocatabl
[all...] |
| IntermediateRep.cpp | 78 * Append an LIR instruction to the LIR list maintained by a compilation
81 void dvmCompilerAppendLIR(CompilationUnit *cUnit, LIR *lir)
85 cUnit->lastLIRInsn = cUnit->firstLIRInsn = lir;
86 lir->prev = lir->next = NULL;
88 cUnit->lastLIRInsn->next = lir;
89 lir->prev = cUnit->lastLIRInsn;
90 lir->next = NULL
[all...] |
| CompilerUtility.h | 56 struct LIR;
71 void dvmDumpLIRInsn(struct LIR *lir, unsigned char *baseAddr);
72 void dvmDumpResourceMask(struct LIR *lir, u8 mask, const char *prefix);
|
| /dalvik/vm/compiler/codegen/arm/ |
| LocalOptimizations.cpp | 49 dvmDumpLIRInsn((LIR *) thisLIR, 0);
50 dvmDumpLIRInsn((LIR *) checkLIR, 0);
67 dvmCompilerInsertLIRAfter((LIR *) origLIR, (LIR *) moveLIR);
255 dvmCompilerInsertLIRBefore((LIR *) checkLIR,
256 (LIR *) newStoreLIR);
446 * is never the first LIR on the list
448 dvmCompilerInsertLIRBefore((LIR *) curLIR,
449 (LIR *) newLoadLIR);
456 void dvmCompilerApplyLocalOptimizations(CompilationUnit *cUnit, LIR *headLIR
[all...] |
| CodegenCommon.cpp | 35 static void setMemRefType(ArmLIR *lir, bool isLoad, int memType)
39 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE));
41 maskPtr = &lir->useMask;
43 maskPtr = &lir->defMask;
61 assert(!(EncodingMap[lir->opcode].flags & IS_STORE));
75 static void annotateDalvikRegAccess(ArmLIR *lir, int regId, bool isLoad)
77 setMemRefType(lir, isLoad, kDalvikReg);
83 lir->aliasInfo = regId;
84 if (DOUBLEREG(lir->operands[0])) {
85 lir->aliasInfo |= 0x80000000
[all...] |
| ArchUtility.cpp | 76 static void buildInsnString(const char *fmt, ArmLIR *lir, char* buf,
96 operand = lir->operands[nc-'0'];
199 (int) baseAddr + lir->generic.offset + 4 +
201 lir->generic.target);
204 int offset_1 = lir->operands[0];
205 int offset_2 = NEXT_LIR(lir)->operands[0];
207 ((((intptr_t) baseAddr + lir->generic.offset + 4) &
219 decodeRegList(lir->opcode, operand, tbuf);
241 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix
[all...] |
| ArchFactory.cpp | 40 branch->generic.target = (LIR *) exceptionLabel;
|
| CodegenDriver.cpp | 42 branchOver->generic.target = (LIR *)target;
208 static void selfVerificationBranchInsert(LIR *currentLIR, ArmOpcode opcode,
216 dvmCompilerInsertLIRBefore(currentLIR, (LIR *) insn);
266 selfVerificationBranchInsert((LIR *) thisLIR, kThumbBlx1,
269 selfVerificationBranchInsert((LIR *) thisLIR, kThumbBlx2,
288 branch->generic.target = (LIR *) target;
618 branchOver->generic.target = (LIR *) target;
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| LocalOptimizations.cpp | 49 dvmDumpLIRInsn((LIR *) thisLIR, 0);
50 dvmDumpLIRInsn((LIR *) checkLIR, 0);
67 dvmCompilerInsertLIRAfter((LIR *) origLIR, (LIR *) moveLIR);
255 dvmCompilerInsertLIRBefore((LIR *) checkLIR,
256 (LIR *) newStoreLIR);
446 * is never the first LIR on the list
448 dvmCompilerInsertLIRBefore((LIR *) curLIR,
449 (LIR *) newLoadLIR);
456 void dvmCompilerApplyLocalOptimizations(CompilationUnit *cUnit, LIR *headLIR
[all...] |
| Ralloc.h | 115 * Mark the beginning and end LIR of a def sequence. Note that
116 * on entry start points to the LIR prior to the beginning of the
120 LIR *start, LIR *finish);
122 * Mark the beginning and end LIR of a def sequence. Note that
123 * on entry start points to the LIR prior to the beginning of the
127 LIR *start, LIR *finish);
|
| CodegenCommon.cpp | 35 static void setMemRefType(MipsLIR *lir, bool isLoad, int memType)
40 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE));
43 maskPtr = &lir->useMask;
45 maskPtr = &lir->defMask;
63 assert(!(EncodingMap[lir->opcode].flags & IS_STORE));
77 static void annotateDalvikRegAccess(MipsLIR *lir, int regId, bool isLoad)
80 setMemRefType(lir, isLoad, kDalvikReg);
86 lir->aliasInfo = regId;
87 if (DOUBLEREG(lir->operands[0])) {
88 lir->aliasInfo |= 0x80000000
[all...] |
| ArchUtility.cpp | 34 static void buildInsnString(const char *fmt, MipsLIR *lir, char* buf,
53 operand = lir->operands[nc-'0'];
118 (int) baseAddr + lir->generic.offset + 4 +
120 lir->generic.target);
127 int offset_1 = lir->operands[0];
128 int offset_2 = NEXT_LIR(lir)->operands[0];
130 ((((intptr_t) baseAddr + lir->generic.offset + 4) &
165 void dvmDumpResourceMask(LIR *lir, u8 mask, const char *prefix)
169 MipsLIR *mipsLIR = (MipsLIR *) lir;
[all...] |
| CodegenFactory.cpp | 131 LIR *defStart;
132 LIR *defEnd;
167 defStart = (LIR *)cUnit->lastLIRInsn;
171 defEnd = (LIR *)cUnit->lastLIRInsn;
201 LIR *defStart;
202 LIR *defEnd;
247 defStart = (LIR *)cUnit->lastLIRInsn;
255 defEnd = (LIR *)cUnit->lastLIRInsn;
|
| GlobalOptimizations.cpp | 322 branchLIR->generic.target = (LIR *) NEXT_LIR(targetLIR);
354 branchLIR->generic.target = (LIR *) NEXT_LIR(targetLIR);
397 (LIR *) delaySlotLIR(firstLIR, thisLIR));
399 dvmCompilerInsertLIRAfter((LIR *) thisLIR,
400 (LIR *) delaySlotLIR(firstLIR, thisLIR));
410 dvmCompilerInsertLIRAfter((LIR *) thisLIR, (LIR *) nopLIR);
|
| CodegenDriver.cpp | 42 branchOver->generic.target = (LIR *)target;
272 static void selfVerificationBranchInsert(LIR *currentLIR, Mipsopcode opcode,
281 dvmCompilerInsertLIRBefore(currentLIR, (LIR *) insn);
332 selfVerificationBranchInsert((LIR *) thisLIR, kThumbBlx1,
335 selfVerificationBranchInsert((LIR *) thisLIR, kThumbBlx2,
354 branch->generic.target = (LIR *) target;
679 branchOver->generic.target = (LIR *) target;
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Factory.cpp | 78 loadPcRel->generic.target = (LIR *) dataTarget;
84 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
133 loadPcRel->generic.target = (LIR *) dataTarget;
139 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
866 dvmCompilerAppendLIR(cUnit, (LIR*)res);
910 dvmCompilerInsertLIRBefore((LIR *) origLIR, (LIR *) pushFP);
917 dvmCompilerInsertLIRBefore((LIR *) origLIR, (LIR *) pushLR);
932 dvmCompilerInsertLIRAfter((LIR *) origLIR, (LIR *) popForLR)
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Gen.cpp | 54 (LIR *) newLIR1(cUnit, kArm16BitData, CHAIN_CELL_OFFSET_TAG);
265 hopBranch->generic.target = (LIR *)hopTarget;
283 branch->generic.target = (LIR *)target;
321 hopBranch->generic.target = (LIR *)hopTarget;
343 branch->generic.target = (LIR *)target;
344 branchOver->generic.target = (LIR *) target;
401 branch1->generic.target = (LIR *)target1;
402 branch2->generic.target = (LIR *)target2;
|
| Factory.cpp | 72 loadPcRel->generic.target = (LIR *) dataTarget;
78 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
180 loadPcRel->generic.target = (LIR *) dataTarget;
186 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
231 loadPcRel->generic.target = (LIR *) dataTarget;
237 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
725 loadPcRel->generic.target = (LIR *) dataTarget;
732 dvmCompilerAppendLIR(cUnit, (LIR *) loadPcRel);
[all...] |
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Factory.cpp | 859 dvmCompilerAppendLIR(cUnit, (LIR*)res);
952 branch->generic.target = (LIR *) exceptionLabel;
977 dvmCompilerInsertLIRBefore((LIR *) origLIR, (LIR *) pushFP);
984 dvmCompilerInsertLIRBefore((LIR *) origLIR, (LIR *) pushLR);
1002 dvmCompilerInsertLIRAfter((LIR *) origLIR, (LIR *) popForLR);
1005 dvmCompilerInsertLIRAfter((LIR *) popForLR, (LIR *) copy)
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | 95 LoopIdiomRecognize &LIR;
309 LIR(TheLIR), CurLoop(TheLIR.getLoop()), PreCondBB(0) {
313 const TargetTransformInfo *TTI = LIR.getTargetTransformInfo();
498 ScalarEvolution *SE = LIR.getScalarEvolution();
499 TargetLibraryInfo *TLI = LIR.getTargetLibraryInfo();
632 if (!LIR.getTargetTransformInfo())
635 LIR.getScalarEvolution();
[all...] |
