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Searched
refs:MCSchedClassDesc
(Results
1 - 8
of
8
) sorted by null
/external/llvm/include/llvm/CodeGen/
TargetSchedule.h
54
/// Return the
MCSchedClassDesc
for this instruction.
55
const
MCSchedClassDesc
*resolveSchedClass(const MachineInstr *MI) const;
92
const
MCSchedClassDesc
*SC = 0) const;
108
ProcResIter getWriteProcResBegin(const
MCSchedClassDesc
*SC) const {
112
ProcResIter getWriteProcResEnd(const
MCSchedClassDesc
*SC) const {
ScheduleDAGInstrs.h
153
const
MCSchedClassDesc
*getSchedClass(SUnit *SU) const {
ScheduleDAG.h
33
struct
MCSchedClassDesc
;
279
const
MCSchedClassDesc
*SchedClass; // NULL or resolved SchedClass.
/external/llvm/include/llvm/MC/
MCSubtargetInfo.h
94
const
MCSchedClassDesc
*SC) const {
98
const
MCSchedClassDesc
*SC) const {
102
const MCWriteLatencyEntry *getWriteLatencyEntry(const
MCSchedClassDesc
*SC,
110
int getReadAdvanceCycles(const
MCSchedClassDesc
*SC, unsigned UseIdx,
MCSchedule.h
93
struct
MCSchedClassDesc
{
193
const
MCSchedClassDesc
*SchedClassTable;
221
const
MCSchedClassDesc
*sc, unsigned npr, unsigned nsc,
244
const
MCSchedClassDesc
*getSchedClassDesc(unsigned SchedClassIdx) const {
/external/llvm/lib/CodeGen/
TargetSchedule.cpp
78
const
MCSchedClassDesc
*SC) const {
123
/// Return the
MCSchedClassDesc
for this instruction. Some SchedClasses require
125
const
MCSchedClassDesc
*TargetSchedModel::
130
const
MCSchedClassDesc
*SCDesc = SchedModel.getSchedClassDesc(SchedClass);
213
const
MCSchedClassDesc
*SCDesc = resolveSchedClass(DefMI);
225
const
MCSchedClassDesc
*UseDesc = resolveSchedClass(UseMI);
256
const
MCSchedClassDesc
*SCDesc = resolveSchedClass(MI);
299
const
MCSchedClassDesc
*SCDesc = resolveSchedClass(DefMI);
MachineScheduler.cpp
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/external/llvm/utils/TableGen/
SubtargetEmitter.cpp
38
std::vector<std::vector<
MCSchedClassDesc
> > ProcSchedClasses;
837
std::vector<
MCSchedClassDesc
> &SCTab = SchedTables.ProcSchedClasses.back();
843
MCSchedClassDesc
&SCDesc = SCTab.back();
854
SCDesc.NumMicroOps =
MCSchedClassDesc
::VariantNumMicroOps;
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