| /dalvik/vm/compiler/codegen/arm/ |
| Codegen.h | 38 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
42 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
46 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
49 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir);
52 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir);
[all...] |
| CodegenDriver.cpp | 47 static bool genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct,
58 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
61 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
69 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
74 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
81 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
88 switch (mir->dalvikInsn.opcode) {
127 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir
4212 MIR *mir; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/FP/ |
| ThumbPortableFP.cpp | 18 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
22 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
26 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
28 static bool handleExecuteInlineC(CompilationUnit *cUnit, MIR *mir);
30 static bool genConversion(CompilationUnit *cUnit, MIR *mir)
[all...] |
| ThumbVFP.cpp | 45 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir)
47 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
64 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
74 switch (mir->dalvikInsn.opcode) {
94 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
110 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
116 switch (mir->dalvikInsn.opcode)
[all...] |
| Thumb2VFP.cpp | 17 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
28 switch (mir->dalvikInsn.opcode) {
48 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1,
63 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir,
70 switch (mir->dalvikInsn.opcode) {
90 return genArithOpDoublePortable(cUnit, mir, rlDest, rlSrc1,
111 static bool genConversion(CompilationUnit *cUnit, MIR *mir)
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| Codegen.h | 38 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
42 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir,
46 static bool genConversionPortable(CompilationUnit *cUnit, MIR *mir);
48 static void genMonitorPortable(CompilationUnit *cUnit, MIR *mir);
50 static void genInterpSingleStep(CompilationUnit *cUnit, MIR *mir);
[all...] |
| Ralloc.h | 77 static inline int dvmCompilerSSASrc(MIR *mir, int num)
79 assert(mir->ssaRep->numUses > num);
80 return mir->ssaRep->uses[num];
129 extern RegLocation dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir,
132 extern RegLocation dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir,
135 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num)
[all...] |
| CodegenDriver.cpp | 47 static bool genConversionCall(CompilationUnit *cUnit, MIR *mir, void *funct,
85 rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
88 rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
97 rlDest = dvmCompilerGetDest(cUnit, mir, 0);
109 rlDest = dvmCompilerGetDestWide(cUnit, mir, 0, 1);
124 static bool genArithOpFloatPortable(CompilationUnit *cUnit, MIR *mir,
131 switch (mir->dalvikInsn.opcode) {
181 static bool genArithOpDoublePortable(CompilationUnit *cUnit, MIR *mir
4335 MIR *mir; local
[all...] |
| CodegenCommon.cpp | 347 static RegLocation inlinedTarget(CompilationUnit *cUnit, MIR *mir,
350 if (mir->next &&
351 ((mir->next->dalvikInsn.opcode == OP_MOVE_RESULT) ||
352 (mir->next->dalvikInsn.opcode == OP_MOVE_RESULT_OBJECT))) {
353 mir->next->dalvikInsn.opcode = OP_NOP;
354 return dvmCompilerGetDest(cUnit, mir->next, 0);
385 static RegLocation inlinedTargetWide(CompilationUnit *cUnit, MIR *mir,
388 if (mir->next &
[all...] |
| /dalvik/vm/compiler/ |
| InlineTransformation.cpp | 39 MIR *invokeMIR,
45 MIR *moveResultMIR = moveResultBB->firstMIRInsn;
46 MIR *newGetterMIR = (MIR *)dvmCompilerNew(sizeof(MIR), true);
110 MIR *invokeMIRSlow = (MIR *)dvmCompilerNew(sizeof(MIR), true);
139 MIR *invokeMIR,
144 MIR *newSetterMIR = (MIR *)dvmCompilerNew(sizeof(MIR), true)
[all...] |
| CompilerIR.h | 128 typedef struct MIR {
132 struct MIR *prev;
133 struct MIR *next;
143 } MIR;
164 MIR *firstMIRInsn;
165 MIR *lastMIRInsn;
291 void dvmCompilerAppendMIR(BasicBlock *bb, MIR *mir);
293 void dvmCompilerPrependMIR(BasicBlock *bb, MIR *mir);
[all...] |
| IntermediateRep.cpp | 31 /* Insert an MIR instruction to the end of a basic block */
32 void dvmCompilerAppendMIR(BasicBlock *bb, MIR *mir)
36 bb->lastMIRInsn = bb->firstMIRInsn = mir;
37 mir->prev = mir->next = NULL;
39 bb->lastMIRInsn->next = mir;
40 mir->prev = bb->lastMIRInsn;
41 mir->next = NULL;
42 bb->lastMIRInsn = mir;
[all...] |
| Loop.cpp | 206 MIR *branch = loopBackBlock->lastMIRInsn;
346 MIR *mir; local
349 for (mir = loopBody->firstMIRInsn; mir; mir = mir->next) {
350 DecodedInstruction *dInsn = &mir->dalvikInsn;
352 dvmCompilerDataFlowAttributes[mir->dalvikInsn.opcode];
354 /* Skip extended MIR instructions *
[all...] |
| Ralloc.cpp | 29 MIR *mir; local
33 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
34 SSARepresentation *ssaRep = mir->ssaRep;
|
| Frontend.cpp | 63 static inline bool findBlockBoundary(const Method *caller, MIR *insn,
164 static inline bool isGoto(MIR *insn)
179 static inline bool isUnconditionalBranch(MIR *insn)
517 MIR *insn = origBlock->firstMIRInsn;
689 const MIR *mir; local
692 for (mir = bb->firstMIRInsn; mir; mir = mir->next)
[all...] |
| Compiler.h | 191 struct MIR;
235 const struct MIR *mir);
|
| SSATransformation.cpp | 488 MIR *phi = (MIR *) dvmCompilerNew(sizeof(MIR), true);
506 MIR *mir; local
509 for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
510 if (mir->dalvikInsn.opcode != (Opcode)kMirOpPhi
[all...] |
| Dataflow.cpp | 25 * instructions, where extended opcode at the MIR level are appended
801 // Beginning of extended MIR opcodes
805 * For extended MIR inserted at the MIR2LIR stage, it is okay to have
922 const MIR *mir)
926 const DecodedInstruction *insn = &mir->dalvikInsn;
937 getSSAName(cUnit, mir->ssaRep->defs[0], operand0),
938 getSSAName(cUnit, mir->ssaRep->uses[0], operand1));
940 for (i = 1; i < mir->ssaRep->numUses; i++) {
942 getSSAName(cUnit, mir->ssaRep->uses[i], operand0))
1110 MIR *mir; local
1217 MIR *mir; local
1348 MIR *mir; local
1425 MIR *mir; local
[all...] |
| /dalvik/vm/compiler/codegen/arm/armv7-a-neon/ |
| MethodCodegenDriver.cpp | 40 static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir,
69 loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset));
98 genPuntToInterp(cUnit, mir->offset);
108 static bool handleMethodFmt10t_Fmt20t_Fmt30t(CompilationUnit *cUnit, MIR *mir,
112 bool backwardBranch = (bb->taken->startOffset <= mir->offset);
115 genSuspendPoll(cUnit, mir);
123 static bool handleMethodFmt10x(CompilationUnit *cUnit, MIR *mir)
[all...] |
| /dalvik/vm/compiler/codegen/ |
| Ralloc.h | 73 static inline int dvmCompilerSSASrc(MIR *mir, int num)
75 assert(mir->ssaRep->numUses > num);
76 return mir->ssaRep->uses[num];
125 extern RegLocation dvmCompilerGetSrcWide(CompilationUnit *cUnit, MIR *mir,
128 extern RegLocation dvmCompilerGetDestWide(CompilationUnit *cUnit, MIR *mir,
131 extern RegLocation dvmCompilerGetSrc(CompilationUnit *cUnit, MIR *mir, int num)
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Gen.cpp | 124 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
133 genInterpSingleStep(cUnit, mir);
186 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
192 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
199 static void genMonitor(CompilationUnit *cUnit, MIR *mir)
201 genMonitorPortable(cUnit, mir);
204 static void genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest
[all...] |
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Gen.cpp | 132 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
143 genInterpSingleStep(cUnit, mir);
218 static MipsLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
224 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
230 static void genMonitor(CompilationUnit *cUnit, MIR *mir)
232 genMonitorPortable(cUnit, mir);
235 static void genCmpLong(CompilationUnit *cUnit, MIR *mir, RegLocation rlDest
[all...] |
| /dalvik/vm/compiler/codegen/mips/FP/ |
| MipsFP.cpp | 44 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir)
46 RegLocation rlSrc = dvmCompilerGetSrcWide(cUnit, mir, 0, 1);
67 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir,
79 switch (mir->dalvikInsn.opcode) {
99 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
118 switch (mir->dalvikInsn.opcode) {
138 return genArithOpFloatPortable(cUnit, mir, rlDest, rlSrc1, rlSrc2);
157 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Gen.cpp | 125 static void genLong3Addr(CompilationUnit *cUnit, MIR *mir, OpKind firstOp,
198 static ArmLIR *genExportPC(CompilationUnit *cUnit, MIR *mir)
203 res = loadConstant(cUnit, rDPC, (int) (cUnit->method->insns + mir->offset));
237 static void genMonitorEnter(CompilationUnit *cUnit, MIR *mir)
239 RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
249 genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
268 loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset))
[all...] |
| /external/grub/netboot/ |
| smc9000.h | 90 #define MIR 8
|
