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Searched
refs:MemSize
(Results
1 - 11
of
11
) sorted by null
/external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCCodeEmitter.cpp
47
template<int
MemSize
>
50
return getOffsetUImm12OpValue(MI, OpIdx, Fixups,
MemSize
);
55
int
MemSize
) const;
142
int
MemSize
) const {
160
assert(
MemSize
<= 16 && "Invalid fixup for operation");
161
FixupKind = FixupsBySize[Log2_32(
MemSize
)];
165
assert(
MemSize
== 8 && "Invalid fixup for operation");
173
assert(
MemSize
<= 8 && "Invalid fixup for operation");
174
FixupKind = FixupsBySize[Log2_32(
MemSize
)];
182
assert(
MemSize
<= 8 && "Invalid fixup for operation")
[
all
...]
/frameworks/av/media/libeffects/lvm/lib/Eq/src/
LVEQNB_Init.c
192
LVM_UINT32
MemSize
;
261
MemSize
= (pCapabilities->MaxBands * sizeof(Biquad_2I_Order2_Taps_t));
263
MemSize
);
264
MemSize
= (pCapabilities->MaxBands * sizeof(LVEQNB_BandDef_t));
266
MemSize
);
269
memset(pInstance->pBandDefinitions, 0,
MemSize
);
270
MemSize
= (pCapabilities->MaxBands * sizeof(LVEQNB_BiquadType_en));
272
MemSize
);
/external/llvm/lib/Target/AArch64/InstPrinter/
AArch64InstPrinter.h
39
template<unsigned
MemSize
, unsigned RmSize>
42
printAddrRegExtendOperand(MI, OpNum, O,
MemSize
, RmSize);
47
raw_ostream &O, unsigned
MemSize
,
143
template<int
MemSize
> void
AArch64InstPrinter.cpp
63
raw_ostream &O, unsigned
MemSize
,
84
unsigned ShiftAmt = Log2_32(
MemSize
);
243
raw_ostream &O, int
MemSize
) {
247
uint32_t Imm = MOImm.getImm() *
MemSize
;
/external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp
57
template<unsigned
MemSize
>
60
if (!CN || CN->getZExtValue() %
MemSize
!= 0
61
|| CN->getZExtValue() /
MemSize
> 0xfff)
64
UImm12 = CurDAG->getTargetConstant(CN->getZExtValue() /
MemSize
, MVT::i64);
/external/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp
303
template<unsigned
MemSize
, unsigned RmSize> bool isAddrRegExtend() const {
313
return ShiftExtend.Amount == Log2_32(
MemSize
) || ShiftExtend.Amount == 0;
424
template<int
MemSize
>
440
if ((Val & (
MemSize
- 1)) != 0) return false;
443
return Val >= 0 && Val <= 0xfff *
MemSize
;
667
template<int
MemSize
> bool isSImm7Scaled() const {
674
if (Val %
MemSize
!= 0) return false;
676
Val /=
MemSize
;
851
template<int
MemSize
>
856
uint64_t Val = CE->getValue() /
MemSize
;
[
all
...]
/external/llvm/lib/Transforms/Scalar/
ScalarReplAggregates.cpp
157
void isSafeMemAccess(uint64_t Offset, uint64_t
MemSize
,
[
all
...]
/external/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp
661
unsigned
MemSize
= fieldFromInstruction(Val, 30, 2);
666
switch (
MemSize
) {
680
llvm_unreachable("Invalid
MemSize
in DecodeLoadPairExclusiveInstruction");
/external/llvm/lib/Target/X86/
X86FastISel.cpp
[
all
...]
X86ISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp
[
all
...]
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