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Searched
refs:SuperRC
(Results
1 - 4
of
4
) sorted by null
/external/llvm/lib/CodeGen/
AggressiveAntiDepBreaker.cpp
599
const TargetRegisterClass *
SuperRC
=
602
ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(
SuperRC
);
610
if (RenameOrder.count(
SuperRC
) == 0)
611
RenameOrder.insert(RenameOrderType::value_type(
SuperRC
, Order.size()));
613
unsigned OrigR = RenameOrder[
SuperRC
];
679
RenameOrder.erase(
SuperRC
);
680
RenameOrder.insert(RenameOrderType::value_type(
SuperRC
, R));
[
all
...]
TargetLoweringBase.cpp
851
const TargetRegisterClass *
SuperRC
= TRI->getRegClass(i);
853
if (
SuperRC
->getSize() <= BestRC->getSize())
855
if (!isLegalRC(
SuperRC
))
857
BestRC =
SuperRC
;
[
all
...]
MachineVerifier.cpp
[
all
...]
/external/llvm/utils/TableGen/
CodeGenRegisters.h
250
// classes
SuperRC
such that:
252
// R:SubRegIndex in this RC for all R in
SuperRC
.
320
CodeGenRegisterClass *
SuperRC
) {
321
SuperRegClasses[SubIdx].insert(
SuperRC
);
Completed in 224 milliseconds