/bionic/libc/kernel/arch-mips/asm/ |
mipsregs.h | 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) macro 484 #define __read_ulong_c0_register(reg, sel) ((sizeof(unsigned long) == 4) ? (unsigned long) __read_32bit_c0_register(reg, sel) : (unsigned long) __read_64bit_c0_register(reg, sel)) 491 #define read_c0_index() __read_32bit_c0_register($0, 0) 494 #define read_c0_random() __read_32bit_c0_register($1, 0) 501 #define read_c0_conf() __read_32bit_c0_register($3, 0) 509 #define read_c0_pagemask() __read_32bit_c0_register($5, 0) 511 #define read_c0_wired() __read_32bit_c0_register($6, 0) 514 #define read_c0_info() __read_32bit_c0_register($7, 0) 515 #define read_c0_cache() __read_32bit_c0_register($7, 0) 520 #define read_c0_count() __read_32bit_c0_register($9, 0 [all...] |
mipsmtregs.h | 25 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 27 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 29 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 30 #define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) 32 #define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) 35 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) 37 #define read_c0_tcbind() __read_32bit_c0_register($2, 2) 39 #define read_c0_tccontext() __read_32bit_c0_register($2, 5)
|
/development/ndk/platforms/android-9/arch-mips/include/asm/ |
mipsregs.h | 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) macro 484 #define __read_ulong_c0_register(reg, sel) ((sizeof(unsigned long) == 4) ? (unsigned long) __read_32bit_c0_register(reg, sel) : (unsigned long) __read_64bit_c0_register(reg, sel)) 491 #define read_c0_index() __read_32bit_c0_register($0, 0) 494 #define read_c0_random() __read_32bit_c0_register($1, 0) 501 #define read_c0_conf() __read_32bit_c0_register($3, 0) 509 #define read_c0_pagemask() __read_32bit_c0_register($5, 0) 511 #define read_c0_wired() __read_32bit_c0_register($6, 0) 514 #define read_c0_info() __read_32bit_c0_register($7, 0) 515 #define read_c0_cache() __read_32bit_c0_register($7, 0) 520 #define read_c0_count() __read_32bit_c0_register($9, 0 [all...] |
mipsmtregs.h | 25 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 27 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 29 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 30 #define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) 32 #define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) 35 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) 37 #define read_c0_tcbind() __read_32bit_c0_register($2, 2) 39 #define read_c0_tccontext() __read_32bit_c0_register($2, 5)
|
/external/kernel-headers/original/asm-mips/ |
mipsregs.h | 607 #define __read_32bit_c0_register(source, sel) \ macro 675 (unsigned long) __read_32bit_c0_register(reg, sel) : \ 765 #define read_c0_index() __read_32bit_c0_register($0, 0) 768 #define read_c0_random() __read_32bit_c0_register($1, 0) 777 #define read_c0_conf() __read_32bit_c0_register($3, 0) 786 #define read_c0_pagemask() __read_32bit_c0_register($5, 0) 789 #define read_c0_wired() __read_32bit_c0_register($6, 0) 792 #define read_c0_info() __read_32bit_c0_register($7, 0) 794 #define read_c0_cache() __read_32bit_c0_register($7, 0) /* TX39xx */ 800 #define read_c0_count() __read_32bit_c0_register($9, 0 [all...] |
mipsmtregs.h | 19 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 22 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 23 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 25 #define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) 28 #define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) 31 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) 34 #define read_c0_tcbind() __read_32bit_c0_register($2, 2) 36 #define read_c0_tccontext() __read_32bit_c0_register($2, 5)
|
/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
mipsregs.h | 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) macro 484 #define __read_ulong_c0_register(reg, sel) ((sizeof(unsigned long) == 4) ? (unsigned long) __read_32bit_c0_register(reg, sel) : (unsigned long) __read_64bit_c0_register(reg, sel)) 491 #define read_c0_index() __read_32bit_c0_register($0, 0) 494 #define read_c0_random() __read_32bit_c0_register($1, 0) 501 #define read_c0_conf() __read_32bit_c0_register($3, 0) 509 #define read_c0_pagemask() __read_32bit_c0_register($5, 0) 511 #define read_c0_wired() __read_32bit_c0_register($6, 0) 514 #define read_c0_info() __read_32bit_c0_register($7, 0) 515 #define read_c0_cache() __read_32bit_c0_register($7, 0) 520 #define read_c0_count() __read_32bit_c0_register($9, 0 [all...] |
mipsmtregs.h | 25 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 27 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 29 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 30 #define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) 32 #define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) 35 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) 37 #define read_c0_tcbind() __read_32bit_c0_register($2, 2) 39 #define read_c0_tccontext() __read_32bit_c0_register($2, 5)
|
/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
mipsregs.h | 479 #define __read_32bit_c0_register(source, sel) ({ int __res; if (sel == 0) __asm__ __volatile__( "mfc0\t%0, " #source "\n\t" : "=r" (__res)); else __asm__ __volatile__( ".set\tmips32\n\t" "mfc0\t%0, " #source ", " #sel "\n\t" ".set\tmips0\n\t" : "=r" (__res)); __res; }) macro 484 #define __read_ulong_c0_register(reg, sel) ((sizeof(unsigned long) == 4) ? (unsigned long) __read_32bit_c0_register(reg, sel) : (unsigned long) __read_64bit_c0_register(reg, sel)) 491 #define read_c0_index() __read_32bit_c0_register($0, 0) 494 #define read_c0_random() __read_32bit_c0_register($1, 0) 501 #define read_c0_conf() __read_32bit_c0_register($3, 0) 509 #define read_c0_pagemask() __read_32bit_c0_register($5, 0) 511 #define read_c0_wired() __read_32bit_c0_register($6, 0) 514 #define read_c0_info() __read_32bit_c0_register($7, 0) 515 #define read_c0_cache() __read_32bit_c0_register($7, 0) 520 #define read_c0_count() __read_32bit_c0_register($9, 0 [all...] |
mipsmtregs.h | 25 #define read_c0_mvpcontrol() __read_32bit_c0_register($0, 1) 27 #define read_c0_mvpconf0() __read_32bit_c0_register($0, 2) 29 #define read_c0_mvpconf1() __read_32bit_c0_register($0, 3) 30 #define read_c0_vpecontrol() __read_32bit_c0_register($1, 1) 32 #define read_c0_vpeconf0() __read_32bit_c0_register($1, 2) 35 #define read_c0_tcstatus() __read_32bit_c0_register($2, 1) 37 #define read_c0_tcbind() __read_32bit_c0_register($2, 2) 39 #define read_c0_tccontext() __read_32bit_c0_register($2, 5)
|