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Searched
refs:__tmp2
(Results
1 - 7
of
7
) sorted by null
/bionic/libc/kernel/arch-mips/asm/
div64.h
25
#define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp,
__tmp2
, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (
__tmp2
) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
/development/ndk/platforms/android-9/arch-mips/include/asm/
div64.h
25
#define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp,
__tmp2
, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (
__tmp2
) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
/external/kernel-headers/original/asm-mips/
div64.h
24
unsigned long __cf, __tmp,
__tmp2
, __i; \
53
"=&r" (__i), "=&r" (
__tmp2
) \
/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/
div64.h
25
#define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp,
__tmp2
, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (
__tmp2
) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/
div64.h
25
#define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp,
__tmp2
, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (
__tmp2
) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
/external/stlport/src/
lock_free_slist.h
67
int
__tmp2
; // and edx registers will not have the same value as their input.
local
77
:"=a" (__tmp1), "=d" (
__tmp2
), "=c" (__tmp3)
/ndk/sources/cxx-stl/stlport/src/
lock_free_slist.h
67
int
__tmp2
; // and edx registers will not have the same value as their input.
local
77
:"=a" (__tmp1), "=d" (
__tmp2
), "=c" (__tmp3)
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