| /external/compiler-rt/lib/arm/ |
| adddf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vadd.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| muldf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vmul.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| subdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vsub.f64 d6, d6, d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| divdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
23 vdiv.f64 d5, d6, d7
|
| eqdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| gedf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| gtdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| ledf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| ltdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| nedf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| unorddf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
24 vcmp.f64 d6, d7
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_PredictIntra_4x4_s.S | 120 VHADD.U8 d6,d3,d5
121 VRHADD.U8 d6,d6,d4
122 VST1.32 {d6[0]},[r3],r5
123 VEXT.8 d6,d6,d6,#1
124 VST1.32 {d6[0]},[r3],r5
125 VEXT.8 d6,d6,d6,#
[all...] |
| armVCM4P10_TransformResidual4x4_s.S | 20 VSUB.I16 d6,d0,d2
26 VADD.I16 d1,d6,d7
27 VSUB.I16 d2,d6,d7
33 VSUB.I16 d6,d0,d2
39 VADD.I16 d1,d6,d7
40 VSUB.I16 d2,d6,d7
|
| omxVCM4P10_PredictIntra_16x16_s.S | 119 VPADDL.U32 d6,d0
120 VRSHR.U64 d8,d6,#4
134 VADD.I64 d8,d7,d6
144 VST1.8 {d6,d7},[r3],r10
145 VST1.8 {d6,d7},[r8],r10
146 VST1.8 {d6,d7},[r3],r10
147 VST1.8 {d6,d7},[r8],r10
148 VST1.8 {d6,d7},[r3],r10
149 VST1.8 {d6,d7},[r8],r10
150 VST1.8 {d6,d7},[r3],r1
[all...] |
| omxVCM4P10_InterpolateLuma_s.S | 104 VRHADD.U8 d6,d6,d12
109 VST1.32 {d6[0]},[r12]
121 VRHADD.U8 d28,d28,d6
140 VRHADD.U8 d6,d6,d20
145 VST1.32 {d6[0]},[r12]
158 VRHADD.U8 d28,d28,d6
173 VST1.32 {d6[0]},[r12]
191 VRHADD.U8 d6,d6,d2
[all...] |
| omxVCM4P10_TransformDequantLumaDCFromPair_s.S | 25 VSUB.I16 d6,d0,d1
31 VSUB.I16 d2,d6,d7
33 VADD.I16 d3,d6,d7
39 VSUB.I16 d6,d0,d1
43 VSUB.I16 d2,d6,d7
44 VADD.I16 d3,d6,d7
|
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S | 43 VLD1.8 {d6},[r2]
44 VTBL.8 d8,{d6},d7
45 VTBL.8 d4,{d6},d9
63 VSUB.I16 d6,d0,d2
69 VADD.I16 d1,d6,d7
70 VSUB.I16 d2,d6,d7
76 VSUB.I16 d6,d0,d2
82 VADD.I16 d1,d6,d7
83 VSUB.I16 d2,d6,d7
|
| omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.S | 40 VLD1.8 {d6},[r0],r11
45 VZIP.8 d6,d9
51 VZIP.16 d6,d4
55 VTRN.32 d7,d6
59 VABD.U8 d19,d6,d4
76 VZIP.8 d7,d6
84 VZIP.16 d6,d29
87 VTRN.32 d6,d25
93 VST1.8 {d6},[r0],r11
|
| armVCM4P10_InterpolateLuma_HalfDiagVerHor4x4_unsafe_s.S | 27 VLD1.8 {d6,d7},[r0],r1
34 VMLAL.U8 q9,d6,d31
35 VMLAL.U8 q10,d6,d31
53 VADDL.U8 q12,d6,d16
54 VMLSL.U8 q11,d6,d30
99 VEXT.8 d29,d25,d6,#2
110 VQRSHRUN.S32 d6,q3,#10
114 VQMOVN.U16 d6,q3
|
| omxVCM4P10_PredictIntraChroma_8x8_s.S | 62 VMOV.I8 d6,#0x4
64 VSHR.U64 d6,d6,#32
65 VADD.I8 d6,d6,d5
67 VTBL.8 d4,{d1-d2},d6
130 VLD1.8 {d6[]},[r0],r10
156 VEXT.8 d9,d4,d6,#2
176 VDUP.16 q0,d6[0]
177 VDUP.16 q1,d6[1
[all...] |
| armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.S | 45 VMLS.I16 d6,d16,d30
49 VMLA.I16 d6,d18,d31
53 VQRSHRUN.S16 d6,q3,#5
|
| /external/kernel-headers/original/asm-generic/ |
| xor.h | 109 register long d0, d1, d2, d3, d4, d5, d6, d7; local
116 d6 = p1[6];
124 d6 ^= p2[6];
132 p1[6] = d6;
146 register long d0, d1, d2, d3, d4, d5, d6, d7; local
153 d6 = p1[6];
161 d6 ^= p2[6];
169 d6 ^= p3[6];
177 p1[6] = d6;
192 register long d0, d1, d2, d3, d4, d5, d6, d7 local
247 register long d0, d1, d2, d3, d4, d5, d6, d7; local
440 register long d0, d1, d2, d3, d4, d5, d6, d7; local
487 register long d0, d1, d2, d3, d4, d5, d6, d7; local
545 register long d0, d1, d2, d3, d4, d5, d6, d7; local
614 register long d0, d1, d2, d3, d4, d5, d6, d7; local
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-vld-encoding.s | 12 vld1.16 {d4, d5, d6}, [r3:64]
13 vld1.32 {d5, d6, d7}, [r3]
14 vld1.64 {d6, d7, d8}, [r3:64]
16 vld1.16 {d4, d5, d6, d7}, [r3:64]
17 vld1.32 {d5, d6, d7, d8}, [r3]
18 vld1.64 {d6, d7, d8, d9}, [r3:64]
39 vld1.16 {d4, d5, d6}, [r3:64]!
40 vld1.32 {d5, d6, d7}, [r3]!
41 vld1.64 {d6, d7, d8}, [r3:64]!
44 vld1.16 {d4, d5, d6}, [r3:64], r
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| vp8_subpixelvariance16x16_neon.asm | 54 vld1.u8 {d5, d6, d7}, [r0], r1
73 vmull.u8 q10, d6, d0
80 vext.8 d5, d5, d6, #1
90 vext.8 d6, d6, d7, #1
95 vmlal.u8 q10, d6, d1
111 vld1.u8 {d5, d6, d7}, [r0], r1
126 vmull.u8 q12, d6, d0
131 vext.8 d5, d5, d6, #1
139 vext.8 d6, d6, d7, #
[all...] |
| /system/core/debuggerd/ |
| vfp.S | 12 fconstd d6, #6
|
