| /external/llvm/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 37 emitSPUpdate(MachineBasicBlock &MBB,
71 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
74 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
108 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
113 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
184 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
259 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
297 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
299 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
316 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize)
[all...] |
| ARMFrameLowering.cpp | 119 emitSPUpdate(bool isARM,
163 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -VARegSaveSize,
168 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
266 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -NumBytes,
371 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes);
423 emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes);
475 emitSPUpdate(isARM, MBB, MBBI, dl, TII, VARegSaveSize);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.h | 105 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
|
| AArch64FrameLowering.cpp | 89 emitSPUpdate(MBB, MBBI, DL, TII, AArch64::X16, -NumInitialBytes,
148 emitSPUpdate(MBB, MBBI, DL, TII, AArch64::X16, -NumResidualBytes,
273 emitSPUpdate(MBB, MBBI, DL, TII, AArch64::X16,
314 emitSPUpdate(MBB, FirstEpilogue, DL,TII, AArch64::X16, NumResidualBytes);
623 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, Amount);
629 emitSPUpdate(MBB, MI, dl, TII, AArch64::NoRegister, -CalleePopAmount);
|
| AArch64InstrInfo.cpp | 699 void llvm::emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 143 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
146 void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI,
[all...] |
