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    Searched refs:getMachineOpValue (Results 1 - 11 of 11) sorted by null

  /external/llvm/lib/Target/R600/MCTargetDesc/
AMDGPUMCCodeEmitter.h 32 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
SIMCCodeEmitter.cpp 63 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
171 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
R600MCCodeEmitter.cpp 59 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
513 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
  /external/llvm/lib/Target/PowerPC/
PPCCodeEmitter.cpp 59 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
60 unsigned getMachineOpValue(const MachineInstr &MI,
184 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
200 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
209 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
220 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 16;
224 return (getMachineOpValue(MI, MO) & 0xFFFF) | RegBits;
236 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 14;
240 return (getMachineOpValue(MI, MO) & 0x3FFF) | RegBits;
254 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI
    [all...]
  /external/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCCodeEmitter.cpp 71 /// getMachineOpValue - Return binary encoding of operand. If the machine
73 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
117 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
139 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
150 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
161 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
174 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 16;
178 return (getMachineOpValue(MI, MO, Fixups) & 0xFFFF) | RegBits;
196 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 14;
200 return (getMachineOpValue(MI, MO, Fixups) & 0x3FFF) | RegBits
    [all...]
  /external/llvm/lib/Target/Mips/MCTargetDesc/
MipsMCCodeEmitter.cpp 79 // getMachineOpValue - Return binary encoding of operand. If the machin
81 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
193 /// getMachineOpValue - Return binary encoding of operand. If the machine
196 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
314 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups) << 16;
315 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups);
324 unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
335 unsigned Position = getMachineOpValue(MI, MI.getOperand(OpNo-1), Fixups);
336 unsigned Size = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
  /external/llvm/lib/Target/Mips/
MipsCodeEmitter.cpp 100 /// getMachineOpValue - Return binary encoding of operand. If the machine
102 unsigned getMachineOpValue(const MachineInstr &MI,
197 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
198 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
204 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
210 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
211 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
214 /// getMachineOpValue - Return binary encoding of operand. If the machine
216 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
  /external/llvm/lib/Target/ARM/
ARMCodeEmitter.cpp 152 /// getMachineOpValue - Return binary encoding of operand. If the machine
154 unsigned getMachineOpValue(const MachineInstr &MI,
156 unsigned getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const {
157 return getMachineOpValue(MI, MI.getOperand(OpIdx));
162 // operand values, instead querying getMachineOpValue() directly for
469 /// getMachineOpValue - Return binary encoding of operand. If the machine
471 unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI,
754 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
769 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
792 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift
    [all...]
  /external/llvm/lib/Target/MBlaze/MCTargetDesc/
MBlazeMCCodeEmitter.cpp 48 /// getMachineOpValue - Return binary encoding of operand. If the machine
50 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO) const;
51 unsigned getMachineOpValue(const MCInst &MI, unsigned OpIdx) const {
52 return getMachineOpValue(MI, MI.getOperand(OpIdx));
107 /// getMachineOpValue - Return binary encoding of operand. If the machine
109 unsigned MBlazeMCCodeEmitter::getMachineOpValue(const MCInst &MI,
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCCodeEmitter.cpp 87 /// getMachineOpValue - Return binary encoding of operand. If the machine
89 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
345 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI,
  /external/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp 72 /// getMachineOpValue - Return binary encoding of operand. If the machine
74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
403 /// getMachineOpValue - Return binary encoding of operand. If the machine
406 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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