| /external/llvm/test/MC/Mips/ |
| mips-expansions.s | 10 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
13 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
16 # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c]
|
| mips-relocations.s | 5 # CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
13 # CHECK: lui $2, %dtprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
25 # CHECK: lui $2, %tprel_hi(_gp_disp) # encoding: [A,A,0x02,0x3c]
30 lui $2, %hi(_gp_disp)
34 lui $2, %dtprel_hi(_gp_disp)
40 lui $2, %tprel_hi(_gp_disp)
|
| hilo-addressing.s | 6 lui $4,%hi(addr)
|
| /frameworks/native/opengl/libagl/arch-mips/ |
| fixed_asm.S | 41 lui $t3,0x8000
56 lui $t1,0x8000
|
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 154 lui addrTemp, (offset + 0x8000) >> 16
161 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
196 lui addrTemp, (offset + 0x8000) >> 16
202 m_assembler.lui(addrTempRegister, (dest.offset + 0x8000) >> 16);
385 lui addrTemp, (offset + 0x8000) >> 16
392 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
474 lui addrTemp, (offset + 0x8000) >> 16
478 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16);
491 lui addrTemp, (offset + 0x8000) >> 16
495 m_assembler.lui(addrTempRegister, (address.offset + 0x8000) >> 16)
[all...] |
| MIPSAssembler.h | 257 lui(dest, imm >> 16);
263 void lui(RegisterID rt, int imm) function in class:JSC::MIPSAssembler
771 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
804 ASSERT((*insn & 0xffe00000) == 0x3c000000); // lui
841 /* lui */
848 } else if ((*insn & 0xffe00000) == 0x3c000000) { // lui
853 /* lui */
893 lui $25, target >> 16
924 /* lui */
949 /* lui $25, (to >> 16) & 0xffff *
[all...] |
| /external/openssl/crypto/sha/asm/ |
| sha1-mips.pl | 288 lui $K,0x5a82
295 lui $K,0x6ed9
300 lui $K,0x8f1b
305 lui $K,0xca62
|
| sha1-mips.S | 40 lui $31,0x5a82
507 lui $31,0x6ed9
869 lui $31,0x8f1b
1271 lui $31,0xca62
|
| /system/core/libcutils/tests/memset_mips/ |
| android_memset_test.S | 42 DBG lui $t1,0xffff /* $a1 must be 16bits */
|
| /external/v8/test/cctest/ |
| test-disasm-mips.cc | 220 COMPARE(lui(a0, 0x1),
221 "3c040001 lui a0, 0x1");
222 COMPARE(lui(v0, 0xffff),
223 "3c02ffff lui v0, 0xffff");
|
| test-assembler-mips.cc | 136 // Test lui, ori, and addiu, used in the li pseudo-instruction.
140 __ lui(t0, 0x1234);
216 __ lui(v1, 0x8123); // 0x81230000
517 __ lui(t5, 0x3333);
[all...] |
| /external/qemu/target-mips/ |
| helper.c | 291 } lui, lw, srl; member in struct:__anon13958
295 {0x00, 0x3c1b0000, 0xffff0000}, /* 0x3c1b803f : lui k1,%hi(pgd_current_p) */
301 {0x00, 0x3c1b0000, 0xffff0000}, /* 0x3c1b803f : lui k1,%hi(pgd_current_p) */
311 lui_ins = ldl_phys(ebase + handlers[i].lui.off);
314 if (((lui_ins & handlers[i].lui.mask) == handlers[i].lui.op) &&
|
| /external/v8/src/mips/ |
| disasm-mips.cc | 867 case LUI:
868 Format(instr, "lui 'rt, 'imm16x");
|
| assembler-mips.cc | 182 // specially coded on MIPS means that it is a lui/ori instruction, and that is
567 return opcode == LUI;
1449 void Assembler::lui(Register rd, int32_t j) { function in class:v8::Assembler
[all...] |
| assembler-mips.h | 577 // has already deserialized the lui/ori instructions etc.
598 // Here we are patching the address in the LUI/ORI instruction pair.
609 // the instruction that follows LUI/ORI instruction pair. Now, with new jump
611 // follows LUI/ORI pair is substituted with J/JAL, this constant equals
612 // to 3 instructions (LUI+ORI+J/JAL/JR/JALR).
726 void lui(Register rd, int32_t j);
[all...] |
| macro-assembler-mips.cc | 783 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
785 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
794 lui(rd, (j.imm32_ >> kLuiShift) & kImm16Mask);
[all...] |
| /external/jpeg/ |
| mips_idct_le.S | 76 #lui $at, %hi(mips_idct_coefs)
324 lui $s8, 0x8080
|
| /external/openssl/crypto/aes/asm/ |
| aes-mips.S | 937 lui $2,0x8080
942 lui $25,0x1b1b
|
| aes-mips.pl | 1158 lui $x80808080,0x8080
1163 lui $x1b1b1b1b,0x1b1b
[all...] |
| /external/valgrind/main/none/tests/mips32/ |
| MIPS32int.stdout.exp | 243 LUI
244 lui $t0, 0xffff :: rd 0xffff0000 rs 0x0000ffff
245 lui $t0, 0xff00 :: rd 0xff000000 rs 0x0000ff00
246 lui $t0, 0xff :: rd 0x00ff0000 rs 0x000000ff
247 lui $t0, 0x0 :: rd 0x00000000 rs 0x00000000
248 lui $t0, 0x5 :: rd 0x00050000 rs 0x00000005
249 lui $t0, 0x387 :: rd 0x03870000 rs 0x00000387
[all...] |
