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  /external/llvm/test/Transforms/InstCombine/
gep-addrspace.ll 9 define void @func(%myStruct addrspace(1)* nocapture %p) nounwind {
11 %A = getelementptr inbounds %myStruct addrspace(1)* %p, i64 0
12 %B = bitcast %myStruct addrspace(1)* %A to %myStruct*
  /external/llvm/test/CodeGen/X86/
2011-12-08-AVXISelBugs.ll 16 %1 = load <16 x i32> addrspace(1)* undef, align 64
18 store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64
32 %2 = load <16 x i32> addrspace(1)* undef, align 64
34 store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
53 %2 = load <16 x i32> addrspace(1)* undef, align 64
55 store <16 x i32> %3, <16 x i32> addrspace(1)* undef, align 64
67 %0 = load <2 x i64> addrspace(1)* undef, align 16
77 store <8 x i64> %1, <8 x i64> addrspace(1)* undef, align 64
2012-01-12-extract-sv.ll 6 %0 = load <8 x i32> addrspace(1)* undef, align 32
9 store <16 x i32> %2, <16 x i32> addrspace(1)* undef, align 64
dbg-value-isel.ll 9 @sgv = internal addrspace(2) constant [1 x i8] zeroinitializer
10 @fgv = internal addrspace(2) constant [1 x i8] zeroinitializer
12 @llvm.global.annotations = appending global [1 x %0] [%0 { i8* bitcast (void (i32 addrspace(1)*)* @__OpenCL_nbt02_kernel to i8*), i8* bitcast ([1 x i8] addrspace(2)* @sgv to i8*), i8* bitcast ([1 x i8] addrspace(2)* @fgv to i8*), i8* bitcast ([0 x i8*]* @lvgv to i8*), i32 0 }], section "llvm.metadata"
14 define void @__OpenCL_nbt02_kernel(i32 addrspace(1)* %ip) nounwind {
16 call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8), !dbg !9
64 store i32 %tmp7, i32 addrspace(1)* %ip, align 4, !dbg !17
dbg-value-dag-combine.ll 9 define void @__OpenCL_test_kernel(i32 addrspace(1)* %ip) nounwind {
11 call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata
17 %tmp2 = load i32 addrspace(1)* %ip, align 4, !dbg !15
22 %arrayidx = getelementptr i32 addrspace(1)* %ip, i32 %1, !dbg !16
23 store i32 %tmp3, i32 addrspace(1)* %arrayidx, align 4, !dbg !16
MachineSink-eflags.ll 8 %2 = type <{ i32, i32, i8 addrspace(2)* }>
23 %i7 = bitcast i8* %ptr20 to <2 x double> addrspace(1)**
24 %tmp21 = load <2 x double> addrspace(1)** %i7, align 8
51 %arrayidx161.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum652.i
52 %tmp162.i = load <2 x double> addrspace(1)* %arrayidx161.i, align 16
58 %arrayidx229.i = getelementptr <2 x double> addrspace(1)* %tmp21, i64 %tmp22.sum656.i
59 %tmp230.i = load <2 x double> addrspace(1)* %arrayidx229.i, align 16
2012-02-12-dagco.ll 13 store <8 x i64> %4, <8 x i64> addrspace(1)* undef, align 64
2011-02-12-shuffle.ll 12 %tmp1067 = load <16 x i32> addrspace(1)* null, align 64
25 store <16 x i32> %tmp1112, <16 x i32> addrspace(1)* undef, align 64
2012-1-10-buildvector.ll 22 store <8 x i32> %v2, <8 x i32> addrspace(1)* undef, align 32
  /external/clang/test/CodeGen/
atomic.c 99 // CHECK: @addrspace
100 void addrspace(int __attribute__((address_space(256))) * P) { function
102 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
105 // CHECK: cmpxchg i32 addrspace(256)*{{.*}}, i32 0, i32 1 seq_cst
108 // CHECK: atomicrmw xor i32 addrspace(256)*{{.*}}, i32 123 seq_cst
  /external/llvm/test/CodeGen/R600/
schedule-if.ll 6 %0 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
17 %8 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
39 %20 = load <4 x float> addrspace(8)* null
schedule-if-2.ll 6 %0 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2)
9 %3 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
50 %36 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
83 %57 = load <4 x float> addrspace(8)* null
schedule-fs-loop.ll 6 %0 = load <4 x float> addrspace(9)* null
10 %4 = load <4 x float> addrspace(9)* null
12 %6 = load <4 x float> addrspace(9)* null
14 %8 = load <4 x float> addrspace(9)* null
llvm.AMDGPU.tex.ll 20 define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) {
21 %addr = load <4 x float> addrspace(1)* %in
38 store <4 x float> %res16, <4 x float> addrspace(1)* %out
schedule-fs-loop-nested.ll 6 %0 = load <4 x float> addrspace(9)* null
23 %17 = load <4 x float> addrspace(9)* null
25 %19 = load <4 x float> addrspace(9)* null
27 %21 = load <4 x float> addrspace(9)* null
  /external/clang/test/CodeGenOpenCL/
addr-space-struct-arg.cl 23 // CHECK: call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)*
  /external/llvm/test/Feature/
testtype.ll 5 %X = type i32* addrspace(4)*
  /external/llvm/lib/MC/
MCStreamer.cpp 91 unsigned AddrSpace) {
101 EmitBytes(StringRef(buf, Size), AddrSpace);
107 unsigned AddrSpace) {
111 EmitBytes(OSE.str(), AddrSpace);
116 void MCStreamer::EmitSLEB128IntValue(int64_t Value, unsigned AddrSpace) {
120 EmitBytes(OSE.str(), AddrSpace);
124 unsigned AddrSpace) {
126 EmitValue(ABS, Size, AddrSpace);
131 unsigned AddrSpace) {
132 EmitValueImpl(Value, Size, AddrSpace);
    [all...]
  /external/llvm/lib/Target/NVPTX/
NVPTXInstrInfo.cpp 120 unsigned &AddrSpace) const {
126 AddrSpace = getLdStCodeAddrSpace(MI);
131 unsigned &AddrSpace) const {
137 AddrSpace = getLdStCodeAddrSpace(MI);
143 unsigned addrspace = 0; local
146 if (isLoadInstr(*MI, addrspace))
147 if (addrspace == NVPTX::PTXLdStInstCode::SHARED)
149 if (isStoreInstr(*MI, addrspace))
150 if (addrspace == NVPTX::PTXLdStInstCode::SHARED)
  /external/llvm/include/llvm/MC/
MCObjectStreamer.h 75 unsigned AddrSpace);
89 virtual void EmitBytes(StringRef Data, unsigned AddrSpace = 0);
106 unsigned AddrSpace = 0);
  /bionic/libc/kernel/arch-mips/asm/sibyte/
sb1250.h 29 #include <asm/addrspace.h>
  /development/ndk/platforms/android-9/arch-mips/include/asm/sibyte/
sb1250.h 29 #include <asm/addrspace.h>
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64ELFStreamer.cpp 87 virtual void EmitBytes(StringRef Data, unsigned AddrSpace) {
89 MCELFStreamer::EmitBytes(Data, AddrSpace);
96 unsigned AddrSpace) {
98 MCELFStreamer::EmitValueImpl(Value, Size, AddrSpace);
  /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/sibyte/
sb1250.h 29 #include <asm/addrspace.h>
  /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/sibyte/
sb1250.h 29 #include <asm/addrspace.h>

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