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  /external/qemu/tcg/ppc64/
tcg-target.c 874 + 8 /* compiler doubleword */
875 + 8 /* link editor doubleword */
    [all...]
  /dalvik/vm/compiler/codegen/arm/
Assemble.cpp     [all...]
  /dalvik/vm/compiler/codegen/mips/
Assemble.cpp     [all...]
  /external/libvpx/libvpx/vp8/common/x86/
idctllm_sse2.asm 380 ; load up 2 dc words here == 2*16 = doubleword
  /external/valgrind/main/VEX/priv/
host_amd64_defs.h 375 Ain_DACAS, /* lock;cmpxchg8b/16b (doubleword ACAS, 2 x
host_x86_defs.h 362 Xin_DACAS, /* lock;cmpxchg8b (doubleword ACAS, 2 x 32-bit only) */
  /external/valgrind/main/drd/
drd_load_store.c 708 dataSize *= 2; /* since it's a doubleword-CAS */
  /external/valgrind/main/memcheck/tests/
atomic_incs.c 10 it tests doubleword atomics (LDREXD, STREXD) which I don't think it
  /external/llvm/lib/Target/Mips/
MipsInstrFPU.td 348 // Load/store doubleword indexed unaligned.
  /external/llvm/lib/Target/X86/
X86ISelLowering.h 317 // PMULUDQ - Vector multiply packed unsigned doubleword integers
    [all...]
X86InstrSSE.td     [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonVLIWPacketizer.cpp 755 // Store doubleword conditionally
    [all...]
HexagonInstrInfo.td     [all...]
  /external/libvpx/libvpx/vp8/common/ppc/
loopfilter_filters_altivec.asm 72 ;# Unfortunately, there is no doubleword merge instruction.
    [all...]
  /external/valgrind/main/coregrind/
m_oset.c 49 // user data is a struct that would normally be doubleword-aligned.
  /external/valgrind/main/lackey/
lk_main.c 803 dataSize *= 2; /* since it's a doubleword-CAS */
    [all...]
  /external/llvm/lib/Target/ARM/
ARMAsmPrinter.cpp 517 case 'e': // The low doubleword register of a NEON quad register.
518 case 'f': { // The high doubleword register of a NEON quad register.
    [all...]
  /frameworks/base/docs/html/training/articles/
smp.jd 788 Doubleword (64-bit) accesses are <strong>not</strong> atomic, unless the
789 location is doubleword-aligned and special load/store instructions are used.
    [all...]
  /external/qemu-pc-bios/vgabios/
ChangeLog 111 - improved VGA compatible setup for >=8bpp VBE modes (CRTC doubleword mode and
    [all...]
  /external/v8/src/x64/
assembler-x64.h 648 // - Instructions on 32-bit (doubleword) operands/registers use 'l'.
    [all...]
  /external/valgrind/main/callgrind/
main.c 1061 dataSize *= 2; /* since this is a doubleword-cas */
    [all...]
  /external/valgrind/main/exp-dhat/
dh_main.c 979 dataSize *= 2; /* since it's a doubleword-CAS */
    [all...]
  /external/valgrind/main/none/tests/ppc32/
test_isa_2_06_part1.c     [all...]
  /external/valgrind/main/none/tests/ppc64/
test_isa_2_06_part1.c     [all...]
  /external/qemu/target-arm/
translate.c     [all...]

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