| /external/llvm/test/Transforms/InstCombine/ |
| 2002-08-02-CastTest.ll | 6 define i64 @test3(i64 %A) {
7 %c1 = trunc i64 %A to i8 ; <i8> [#uses=1]
8 %c2 = zext i8 %c1 to i64 ; <i64> [#uses=1]
9 ret i64 %c2
|
| zext.ll | 4 define i64 @test_sext_zext(i16 %A) {
6 %c2 = sext i32 %c1 to i64 ; <i64> [#uses=1]
7 ret i64 %c2
9 ; CHECK: %c2 = zext i16 %A to i64
10 ; CHECK: ret i64 %c2
|
| 2006-10-20-mask.ll | 4 define i64 @foo(i64 %tmp, i64 %tmp2) {
5 %tmp.upgrd.1 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
6 %tmp2.upgrd.2 = trunc i64 %tmp2 to i32 ; <i32> [#uses=1]
8 %tmp4 = zext i32 %tmp3 to i64 ; <i64> [#uses=1]
9 ret i64 %tmp4
|
| 2006-12-08-Select-ICmp.ll | 8 define i32 @visible(i32 %direction, i64 %p1.0, i64 %p2.0, i64 %p3.0) {
13 %tmp = bitcast %struct.point* %p1_addr to { i64 }* ; <{ i64 }*> [#uses=1]
14 %tmp.upgrd.1 = getelementptr { i64 }* %tmp, i32 0, i32 0 ; <i64*> [#uses=1]
15 store i64 %p1.0, i64* %tmp.upgrd.1
16 %tmp1 = bitcast %struct.point* %p2_addr to { i64 }* ; <{ i64 }*> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| x86-64-sret-return.ll | 5 %struct.foo = type { [4 x i64] }
21 %tmp1 = getelementptr %struct.foo* %agg.result, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
22 %tmp2 = getelementptr %struct.foo* %tmp, i32 0, i32 0 ; <[4 x i64]*> [#uses=4]
23 %tmp3 = getelementptr [4 x i64]* %tmp1, i32 0, i32 0 ; <i64*> [#uses=1]
24 %tmp4 = getelementptr [4 x i64]* %tmp2, i32 0, i32 0 ; <i64*> [#uses=1]
25 %tmp5 = load i64* %tmp4, align 8 ; <i64> [#uses=1]
26 store i64 %tmp5, i64* %tmp3, align
[all...] |
| atomic-load-store-wide.ll | 6 define void @test1(i64* %ptr, i64 %val1) {
10 store atomic i64 %val1, i64* %ptr seq_cst, align 8
14 define i64 @test2(i64* %ptr) {
17 %val = load atomic i64* %ptr seq_cst, align 8
18 ret i64 %val
|
| ctpop-combine.ll | 3 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
5 define i32 @test1(i64 %x) nounwind readnone {
6 %count = tail call i64 @llvm.ctpop.i64(i64 %x)
7 %cast = trunc i64 %count to i32
19 define i32 @test2(i64 %x) nounwind readnone {
20 %count = tail call i64 @llvm.ctpop.i64(i64 %x
[all...] |
| extmul128.ll | 3 define i128 @i64_sext_i128(i64 %a, i64 %b) {
4 %aa = sext i64 %a to i128
5 %bb = sext i64 %b to i128
9 define i128 @i64_zext_i128(i64 %a, i64 %b) {
10 %aa = zext i64 %a to i128
11 %bb = zext i64 %b to i128
|
| ptrtoint-constexpr.ll | 2 %union.x = type { i64 }
8 @r = global %union.x { i64 ptrtoint (%union.x* @r to i64) }, align 4
14 @x = global i64 mul (i64 3, i64 ptrtoint (i2* getelementptr (i2* null, i64 1) to i64))
|
| ret-i64-0.ll | 3 define i64 @foo() nounwind {
4 ret i64 0
|
| vec_i64.ll | 4 ; Used movq to load i64 into a v2i64 when the top i64 is 0.
6 define <2 x i64> @foo1(i64* %y) nounwind {
8 %tmp1 = load i64* %y, align 8 ; <i64> [#uses=1]
9 %s2v = insertelement <2 x i64> undef, i64 %tmp1, i32 0
10 %loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> <i32 2, i32 1
[all...] |
| palignr-2.ll | 8 define void @t1(<2 x i64> %a, <2 x i64> %b) nounwind ssp {
12 %0 = tail call <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64> %a, <2 x i64> %b, i8 24) nounwind readnone
13 store <2 x i64> %0, <2 x i64>* bitcast ([4 x i32]* @c to <2 x i64>*), align 16
17 declare <2 x i64> @llvm.x86.ssse3.palign.r.128(<2 x i64>, <2 x i64>, i8) nounwind readnon
[all...] |
| 2007-05-14-LiveIntervalAssert.ll | 8 declare void @r_raise(i64, i8*, ...)
10 define i64 @app_send_event(i64 %self, i64 %event_class, i64 %event_id, i64 %params, i64 %need_retval) {
15 ret i64 0
22 call void (i64, i8*, ...)* @r_raise( i64 0, i8* null
[all...] |
| avx-vmovddup.ll | 4 define <4 x i64> @A(<4 x i64> %a) {
5 %c = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
6 ret <4 x i64> %c
10 define <4 x i64> @B(<4 x i64>* %ptr) {
11 %a = load <4 x i64>* %ptr
12 %c = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2
[all...] |
| sext-subreg.ll | 4 define i64 @t(i64 %A, i64 %B, i32* %P, i64 *%P2) nounwind {
9 %C = add i64 %A, %B
10 %D = trunc i64 %C to i32
12 %E = shl i64 %C, 32
13 %F = ashr i64 %E, 32
14 store volatile i64 %F, i64 *%P
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| setcc-takes-i32.ll | 4 ; correctly. Previously LLVM thought that i64 was the appropriate SetCC output,
5 ; which meant it proceded in two steps and produced an i64 -> i64 any_ext which
12 declare {i64, i1} @llvm.umul.with.overflow.i64(i64, i64)
14 define i64 @test_select(i64 %lhs, i64 %rhs)
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| fold-const.ll | 5 %conv = zext i32 %a to i64
6 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %conv, i1 true)
9 %cast = trunc i64 %tmp1 to i32
14 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
|
| 2012-11-14-subs_carry.ll | 12 %tmp2 = zext i32 3 to i64
16 %tmp410 = and i64 1031, 1647010
17 %tmp411 = and i64 %tmp2, -211
18 %tmp412 = shl i64 %tmp410, %tmp2
19 %tmp413 = shl i64 %tmp411, %tmp2
20 %tmp415 = and i64 %tmp413, 1
21 %tmp420 = xor i64 0, %tmp415
22 %tmp421 = and i64 %tmp412, %tmp415
23 %tmp422 = shl i64 %tmp421, 1
27 %tmp423 = lshr i64 %tmp422, 3
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| 2005-10-21-longlonggtu.ll | 3 define float @t(i64 %u_arg) {
4 %u = bitcast i64 %u_arg to i64 ; <i64> [#uses=1]
5 %tmp5 = add i64 %u, 9007199254740991 ; <i64> [#uses=1]
6 %tmp = icmp ugt i64 %tmp5, 18014398509481982 ; <i1> [#uses=1]
13 call float @t( i64 0 ) ; <float>:1 [#uses=0]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2004-11-30-shift-crash.ll | 4 %tr4 = shl i64 1, 0 ; <i64> [#uses=0]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-mulhi.ll | 6 %tmp = sext i32 %x to i64 ; <i64> [#uses=1]
7 %tmp1 = sext i32 %y to i64 ; <i64> [#uses=1]
8 %tmp2 = mul i64 %tmp1, %tmp ; <i64> [#uses=1]
9 %tmp3 = lshr i64 %tmp2, 32 ; <i64> [#uses=1]
10 %tmp3.upgrd.1 = trunc i64 %tmp3 to i32 ; <i32> [#uses=1]
17 %tmp = zext i32 %x to i64 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Integer/ |
| fold-fpcast_bt.ll | 11 define i64 @test3() {
12 ret i64 bitcast (double 0x400921FB4D12D84A to i64)
16 ret double bitcast (i64 42 to double)
27 define i64 @test7() {
28 ret i64 bitcast (double 0x400921FB4D12D84A to i64)
32 ret double bitcast (i64 42 to double)
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| masked-iv.ll | 5 ; Indvars should do the IV arithmetic in the canonical IV type (i64),
8 define void @foo(i64* %A, i64* %B, i64 %n, i64 %a, i64 %s) nounwind {
10 %t0 = icmp sgt i64 %n, 0 ; <i1> [#uses=1]
17 %i.01 = phi i64 [ %t6, %bb ], [ %a, %bb.preheader ] ; <i64> [#uses=3]
18 %t1 = and i64 %i.01, 255 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/LICM/ |
| 2003-02-26-LoopExitNotDominated.ll | 7 %X = alloca [2 x i64] ; <[2 x i64]*> [#uses=1]
10 %reg3011 = getelementptr [2 x i64]* %X, i64 0, i64 0 ; <i64*> [#uses=1]
13 store i64 0, i64* %reg3011
|
| /external/llvm/test/Transforms/Reassociate/ |
| optional-flags.ll | 7 ; CHECK: %y = add i64 %b, %a
8 ; CHECK: %z = add i64 %y, %c
9 define i64 @test0(i64 %a, i64 %b, i64 %c) {
10 %y = add nsw i64 %c, %b
11 %z = add i64 %y, %a
12 ret i64 %z
16 ; CHECK: %y = add i64 %b, %
[all...] |
