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  /external/libvpx/libvpx/vp8/common/x86/
postproc_mmx.asm 58 imul rdx, rax
postproc_sse2.asm 277 imul rdx, rax
  /external/qemu/
host-utils.h 41 __asm__ ("imul %0\n\t"
  /external/quake/quake/src/QW/client/
d_draw16.asm 414 imul eax,edx
459 imul eax,ebx
647 imul ds:dword ptr[reciprocal_table_16-8+ecx*4]
650 imul ds:dword ptr[reciprocal_table_16-8+ecx*4]
659 imul edx,ebx
d_polysa.asm 384 imul ds:dword ptr[4+0+esp]
1038 imul eax,esi
1043 imul edi,esi
  /external/freetype/include/freetype/config/
ftconfig.h 377 "imul %%edx\n"
415 imul edx
  /external/qemu/distrib/sdl-1.2.15/src/stdlib/
SDL_stdlib.c 110 imul edi,esi
115 imul ebx,edx
  /dalvik/vm/compiler/codegen/x86/libenc/
encoder.inl 258 // multiply instructions: mul, imul
267 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm, Opnd_Size sz) {
274 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const Imm_Opnd & imm, Opnd_Size sz) {
281 ENCODER_DECLARE_EXPORT char * imul(char * stream, const R_Opnd & r, const RM_Opnd & rm,
enc_tabl.cpp 124 implicit ones (see IMUL).
157 can be packed in 5 bits. Taking into account the IMUL mnemonic with its 3
162 worst case is IMUL with its 3 operands:
163 (IMUL r64, r/m64, imm32)/(IMUL r32, r/m32, imm32).
    [all...]
enc_prvt.h 361 * which may use different number of operands (i.e. IMUL/SHL) use the
enc_base.h 238 * The [3] mostly comes from IDIV/IMUL which both may have up to 3
274 * operands (i.e. IMUL/SHL) either most common value used, or empty
  /external/openssl/crypto/bn/asm/
x86-mont.pl 315 &imul ($word,&DWP($frame,"esp")); # n0*tp[0]
354 &imul ($word,&DWP($frame,"esp")); # n0*tp[0]
445 &imul ($word,&DWP($frame,"esp")); # n0*tp[0]
547 &imul ($word,&DWP($frame,"esp")); # n0*tp[0]
  /external/llvm/lib/Target/X86/
X86ScheduleAtom.td 48 // imul by al, ax, eax, rax
55 // imul reg by reg|mem
62 // imul reg = reg/mem * imm
  /external/v8/src/ia32/
assembler-ia32.h 781 void imul(Register src); // edx:eax = eax * src.
782 void imul(Register dst, Register src) { imul(dst, Operand(src)); }
783 void imul(Register dst, const Operand& src); // dst = dst * src.
784 void imul(Register dst, Register src, int32_t imm32); // dst = src * imm32.
    [all...]
  /dalvik/dx/tests/024-code-bytecode/
expected.txt 158 0087: imul
small-class.txt 162 68 # 0087: imul
  /external/libvpx/libvpx/examples/includes/geshi/geshi/
asm.php 61 'cmps','cmpsb','cmpsw','cwd','daa','das','dec','div','esc','hlt','idiv','imul','in','inc',
  /dalvik/dx/src/com/android/dx/cf/code/
ByteOps.java 131 public static final int IMUL = 0x68;
458 "68 - imul;" +
  /external/llvm/test/Transforms/LoopStrengthReduce/X86/
ivchain-X86.ll 20 ; X32-NOT: imul
60 ; X32: imul
  /dalvik/dx/tests/032-bb-live-code/
expected.txt 377 007a: imul
  /external/elfutils/libcpu/
ChangeLog 160 Fix lcall, dec, div, idiv, imul, inc, jmp, ljmp, mul, neg, not, push,
  /external/proguard/src/proguard/classfile/instruction/
InstructionConstants.java 340 "imul",
  /external/v8/src/x64/
assembler-x64.h 931 void imul(Register src); // rdx:rax = rax * src.
932 void imul(Register dst, Register src); // dst = dst * src.
933 void imul(Register dst, const Operand& src); // dst = dst * src.
934 void imul(Register dst, Register src, Immediate imm); // dst = src * imm.
    [all...]
  /external/v8/test/cctest/
test-assembler-ia32.cc 138 __ imul(eax, edx);
test-assembler-x64.cc 190 __ imul(arg1);

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