/external/llvm/lib/Target/Sparc/ |
SparcSubtarget.h | 34 SparcSubtarget(const std::string &TT, const std::string &CPU, 43 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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SparcTargetMachine.h | 37 StringRef CPU, StringRef FS, const TargetOptions &Options, 67 StringRef CPU, StringRef FS, 79 StringRef CPU, StringRef FS,
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86AsmBackend.cpp | 69 StringRef CPU; 72 : MCAsmBackend(), CPU(_CPU) {} 309 // This CPU doesnt support long nops. If needed add more. 311 if (CPU == "generic" || CPU == "i386" || CPU == "i486" || CPU == "i586" || 312 CPU == "pentium" || CPU == "pentium-mmx" || CPU == "geode") [all...] |
X86MCTargetDesc.h | 72 MCSubtargetInfo *createX86MCSubtargetInfo(StringRef TT, StringRef CPU, 81 MCAsmBackend *createX86_32AsmBackend(const Target &T, StringRef TT, StringRef CPU); 82 MCAsmBackend *createX86_64AsmBackend(const Target &T, StringRef TT, StringRef CPU);
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCTargetDesc.h | 46 StringRef CPU); 48 StringRef CPU); 50 StringRef CPU); 52 StringRef CPU);
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/external/llvm/lib/Target/R600/ |
AMDGPUSubtarget.cpp | 24 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : 25 AMDGPUGenSubtargetInfo(TT, CPU, FS), DumpCode(false) { 26 InstrItins = getInstrItineraryForCPU(CPU); 31 StringRef GPU = CPU;
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AMDGPUSubtarget.h | 43 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS); 47 virtual void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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/external/webkit/Source/JavaScriptCore/assembler/ |
ARMv7Assembler.cpp | 28 #if ENABLE(ASSEMBLER) && CPU(ARM_THUMB2)
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/external/webkit/Source/WebCore/page/ |
NavigatorBase.cpp | 38 #if OS(MAC_OS_X) && (CPU(PPC) || CPU(PPC64)) 40 #elif OS(MAC_OS_X) && (CPU(X86) || CPU(X86_64))
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/external/llvm/lib/Target/Mips/ |
MipsTargetMachine.cpp | 40 StringRef CPU, StringRef FS, const TargetOptions &Options, 44 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 45 Subtarget(TT, CPU, FS, isLittle, RM), 64 StringRef CPU, StringRef FS, const TargetOptions &Options, 67 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} 73 StringRef CPU, StringRef FS, const TargetOptions &Options, 76 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {}
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MipsSubtarget.cpp | 27 MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, 30 MipsGenSubtargetInfo(TT, CPU, FS), 38 std::string CPUName = CPU; 45 // Initialize scheduling itinerary for the specified CPU.
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/external/llvm/lib/Target/PowerPC/ |
PPCTargetMachine.cpp | 36 StringRef CPU, StringRef FS, 41 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 42 Subtarget(TT, CPU, FS, is64Bit), 56 StringRef CPU, StringRef FS, 60 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { 66 StringRef CPU, StringRef FS, 70 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
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PPCTargetMachine.h | 42 StringRef CPU, StringRef FS, const TargetOptions &Options, 82 StringRef CPU, StringRef FS, const TargetOptions &Options, 93 StringRef CPU, StringRef FS, const TargetOptions &Options,
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/external/webkit/Source/JavaScriptCore/wtf/ |
TCSpinLock.h | 37 #if (CPU(X86) || CPU(X86_64) || CPU(PPC)) && (COMPILER(GCC) || COMPILER(MSVC)) 66 #if CPU(X86) || CPU(X86_64) 96 #if CPU(X86) || CPU(X86_64) 107 #if OS(DARWIN) || CPU(PPC) 147 #if CPU(X86) || CPU(X86_64 [all...] |
/external/chromium/base/ |
cpu_unittest.cc | 5 #include "base/cpu.h" 9 // Tests whether we can run extended instructions represented by the CPU 11 // MMX, SSE, etc.) supported by the CPU and sees we can run them without 14 TEST(CPU, RunExtendedInstructions) { 16 // Retrieve the CPU information. 17 base::CPU cpu; local 20 ASSERT_TRUE(cpu.has_mmx()); 25 if (cpu.has_sse()) { 30 if (cpu.has_sse2()) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonSubtarget.h | 44 HexagonSubtarget(StringRef TT, StringRef CPU, StringRef FS); 53 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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/external/llvm/lib/Target/MBlaze/ |
MBlazeSubtarget.h | 45 MBlazeSubtarget(const std::string &TT, const std::string &CPU, 50 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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MBlazeTargetMachine.cpp | 36 StringRef CPU, StringRef FS, const TargetOptions &Options, 39 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 40 Subtarget(TT, CPU, FS),
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/external/webkit/Source/JavaScriptCore/heap/ |
MachineStackMarker.cpp | 312 #if CPU(X86) 314 #elif CPU(X86_64) 316 #elif CPU(PPC) 318 #elif CPU(PPC64) 320 #elif CPU(ARM) 326 #elif OS(WINDOWS) && CPU(X86) 338 #if CPU(X86) 341 #elif CPU(X86_64) 344 #elif CPU(PPC) 347 #elif CPU(PPC64 [all...] |
/external/clang/include/clang/Basic/ |
TargetOptions.h | 32 /// If given, the name of the target CPU to generate code for. 33 std::string CPU;
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/external/llvm/include/llvm/MC/ |
MCSubtargetInfo.h | 46 uint64_t FeatureBits; // Feature bits for current CPU + FS 49 void InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, 71 /// InitMCProcessorInfo - Set or change the CPU (optionally supplemented with 73 void InitMCProcessorInfo(StringRef CPU, StringRef FS); 83 /// getSchedModelForCPU - Get the machine model of a CPU. 85 const MCSchedModel *getSchedModelForCPU(StringRef CPU) const; 87 /// getSchedModel - Get the machine model for this subtarget's CPU. 129 /// getInstrItineraryForCPU - Get scheduling itinerary of a CPU. 131 InstrItineraryData getInstrItineraryForCPU(StringRef CPU) const;
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/external/webkit/Source/WebCore/platform/text/ |
TextStream.h | 47 #if OS(WINDOWS) && CPU(X86_64)
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/external/llvm/lib/Target/AArch64/ |
AArch64TargetMachine.cpp | 30 StringRef CPU, StringRef FS, 34 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), 35 Subtarget(TT, CPU, FS),
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/external/llvm/lib/Target/NVPTX/ |
NVPTXTargetMachine.h | 51 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, 107 NVPTXTargetMachine32(const Target &T, StringRef TT, StringRef CPU, 116 NVPTXTargetMachine64(const Target &T, StringRef TT, StringRef CPU,
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/external/llvm/lib/Target/ARM/ |
ARMSubtarget.cpp | 44 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &CPU, 46 : ARMGenSubtargetInfo(TT, CPU, FS) 49 , CPUString(CPU) 53 resetSubtargetFeatures(CPU, FS); 100 "target-cpu"); 103 std::string CPU = 109 resetSubtargetFeatures(CPU, FS); 113 void ARMSubtarget::resetSubtargetFeatures(StringRef CPU, StringRef FS) { 131 // ARM version or CPU and then remove this. 135 // Keep a pointer to static instruction cost data for the specified CPU [all...] |