| /external/qemu/distrib/sdl-1.2.15/src/video/ataricommon/ |
| SDL_ikbdinterrupt.S | 47 moveml d0-d1/a0-a1,sp@
49 moveml d0-d1/a0-a1,sp@-
58 lea 0xfffffa00:w,a0
59 btst #6,a0@(0x09)
66 btst #6,a0@(0x15)
79 lea ikbd,a0
80 movel a0,0x118:w
110 moveml sp@,d0-d1/a0-a1
115 moveml sp@+,d0-d1/a0-a1
122 movel a0,sp@
[all...] |
| SDL_xbiosinterrupt.S | 45 movel sp@(4),a0
57 movel a0@(16),d1
60 movel a0@(16),oldmousevector
62 movel d0,a0@(16)
71 movel a0@(24),d1
74 movel a0@(24),oldjoystickvector
76 movel d0,a0@(24)
88 movel sp@(4),a0
98 movel d0,a0@(16)
105 movel d0,a0@(24
[all...] |
| /bionic/libc/arch-mips/bionic/ |
| memcmp16.S | 41 beq $a0,$a1,done /* strings are identical */
44 1: lhu $t0,0($a0)
48 addu $a0,2
|
| pipe.S | 52 sw $v0, 0($a0)
53 sw $v1, 4($a0)
59 move $a0, $v0 /* delay slot, prepare args for __set_errno */
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_INVOKE_METHOD_NATIVE.S | 0 # a0 = methodToCall, a1 = returnCell, rPC = dalvikCallsite
2 lh t7, offMethod_registersSize(a0) # t7<- methodToCall->regsSize
14 # a1 = newFP, a0 = methodToCall, a3 = returnCell, rPC = dalvikCallsite
17 lw rPC, offMethod_insns(a0) # rPC<- methodToCall->insns
22 sw a0, (offStackSaveArea_method - sizeofStackSaveArea)(a1)
23 lw rTEMP, offMethod_nativeFunc(a0) # t9<- method->nativeFunc
39 move a2, a0 # a2<- methodToCall
40 move a0, a1 # a0<- newFp
45 # preserve rTEMP,a0-a
[all...] |
| TEMPLATE_STRING_COMPARETO.S | 4 * Requires a0/a1 to have been previously checked for null. Will
14 * a0: this object pointer
19 subu v0, a0, a1 # Same?
23 lw t0, STRING_FIELDOFF_OFFSET(a0)
25 lw t2, STRING_FIELDOFF_COUNT(a0)
27 lw a0, STRING_FIELDOFF_VALUE(a0)
34 * value: a0/a1
46 addu a0, 16 # point to contents[0]
51 addu a0, a0, t
[all...] |
| fbinop.S | 3 * Generic 32-bit binary float operation. a0 = a1 op a2.
8 * a0 = target dalvik register address
15 move rOBJ, a0 # save a0
17 LOAD(a0, a1) # a0<- vBB
|
| /dalvik/vm/mterp/mips/ |
| OP_USHR_LONG_2ADDR.S | 11 LOAD64(a0, a1, t3) # a0/a1 <- vAA/vAA+1
15 srl v0, a0, a2 # rlo<- alo >> (shift&31)
16 not a0, a2 # alo<- 31-n (shift is 5b)
18 sll a1, a0 # ahi<- ahi << (32-(shift&31))
25 STORE64(v0, v1, t3) # vAA/vAA+1 <- a0/a1
|
| binopWide.S | 1 %default {"preinstr":"", "result0":"a0", "result1":"a1", "chkzero":"0", "arg0":"a0", "arg1":"a1", "arg2":"a2", "arg3":"a3"}
4 * specifies an instruction that performs "result = a0-a1 op a2-a3".
6 * comes back in a register other than a0, you can override "result".)
17 FETCH(a0, 1) # a0 <- CCBB
19 and a2, a0, 255 # a2 <- BB
20 srl a3, a0, 8 # a3 <- CC
24 LOAD64($arg0, $arg1, a2) # a0/a1 <- vBB/vBB+1
33 $instr # result <- op, a0-a3 change
[all...] |
| footer.S | 19 move rSELF, a0 # restore self
36 move rPC, a0 # set up dalvik pc
45 move a0, rPC # pass our target PC
52 move a0, rPC # pass our target PC
59 lw a0, 0(ra) # pass our target PC
66 lw a0, 0(ra) # pass our target PC
73 lw a0, 0(ra) # pass our target PC
80 move a0, rPC # pass our target PC
92 move rSELF, a0 # restore self
95 lw a0, offThread_jitResumeNPC(rSELF
[all...] |
| OP_CMP_LONG.S | 17 FETCH(a0, 1) # a0 <- CCBB
19 and a2, a0, 255 # a2 <- BB
20 srl a3, a0, 8 # a3 <- CC
23 LOAD64(a0, a1, a2) # a0/a1 <- vBB/vBB+1
32 sltu t0, a0, a2 # compare lo
33 sgtu t1, a0, a2
|
| OP_NEW_ARRAY.S | 12 GET_OPB(a0) # a0 <- B
15 GET_VREG(a1, a0) # a1 <- vB (array length)
17 LOAD_eas2(a0, a3, a2) # a0 <- resolved class
22 beqz a0, .L${opcode}_resolve
27 * a0 holds class
53 LOAD_base_offMethod_clazz(a0, a3) # a0 <- method->clazz
58 move a0, v
[all...] |
| OP_NEW_INSTANCE.S | 16 LOAD_eas2(a0, a3, a1) # a0 <- resolved class
22 beqz a0, .L${opcode}_resolve # no, resolve it now
23 .L${opcode}_resolved: # a0=class
24 lbu a1, offClassObject_status(a0) # a1 <- ClassStatus enum
27 move rOBJ, a0 # save a0
30 .L${opcode}_initialized: # a0=class
31 LOAD_base_offClassObject_accessFlags(a3, a0) # a3 <- clazz->accessFlags
33 # a0=clas
[all...] |
| OP_SGET_WIDE.S | 13 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
15 bnez a0, .L${opcode}_finish
29 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
31 move a0, v0
48 vLOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
50 LOAD64_off(a2, a3, a0, offStaticField_value) # a2/a3 <- field value (aligned)
|
| OP_SPUT.S | 15 LOAD_eas2(a0, rBIX, a1) # a0 <- resolved StaticField ptr
16 bnez a0, .L${opcode}_finish # is resolved entry null?
27 LOAD_base_offMethod_clazz(a0, a2) # a0 <- method->clazz
29 move a0, v0
42 # field ptr in a0
48 sw a1, offStaticField_value(a0) # field <- vAA
|
| OP_INVOKE_INTERFACE.S | 23 LOAD_base_offObject_clazz(a0, rOBJ) # a0 <- thisPtr->clazz
25 move a0, v0
28 b common_invokeMethod${routine} # (a0=method, rOBJ="this")
|
| OP_IPUT_QUICK.S | 10 GET_VREG(a0, a2) # a0 <- fp[A]
13 sw a0, 0(t0) # obj.field (always 32 bits) <- a0
|
| unflopWide.S | 4 * specifies an instruction that performs "result = op a0/a1".
15 LOAD64(rARG0, rARG1, a3) # a0/a1 <- vAA
21 $instr # a0/a1 <- op, a2-a3 changed
25 STORE64(rRESULT0, rRESULT1, rOBJ) # vAA <- a0/a1
27 $st_result # vAA <- a0/a1
|
| /external/clang/test/CXX/temp/temp.fct.spec/temp.deduct/temp.deduct.call/ |
| p2.cpp | 10 A<int> a0 = f0(arr0); local
20 A<int(int, int)> a0 = f0(g0); local
31 A<X> a0 = f1(get_X()); local
|
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 130 sent as a0(MSW), a1(LSW) for a function call in LE mode should be sent as a1, a0 in
134 #define rARG0 a0
142 #define rARG1 a0
446 * This code assumes the register pair ordering will depend on endianess (a1:a0 or a0:a1).
447 * a1:a0 => vBB
475 # preserve a0-a2 and ra
476 SCRATCH_STORE(a0, 0)
481 # a0=rSEL
[all...] |
| /frameworks/base/core/tests/coretests/src/android/os/ |
| IAidlTest.aidl | 34 boolean[] booleanArray(in boolean[] a0, out boolean[] a1, inout boolean[] a2);
35 char[] charArray(in char[] a0, out char[] a1, inout char[] a2);
36 int[] intArray(in int[] a0, out int[] a1, inout int[] a2);
37 long[] longArray(in long[] a0, out long[] a1, inout long[] a2);
38 float[] floatArray(in float[] a0, out float[] a1, inout float[] a2);
39 double[] doubleArray(in double[] a0, out double[] a1, inout double[] a2);
40 String[] stringArray(in String[] a0, out String[] a1, inout String[] a2);
41 AidlTest.TestParcelable[] parcelableArray(in AidlTest.TestParcelable[] a0,
|
| /system/core/libcutils/tests/memset_mips/ |
| android_memset_dumb.S | 10 1: sh $a1,($a0)
13 addu $a0,2
28 1: sw $a1,($a0)
31 addu $a0,4
|
| memset_omips.S | 40 move v0, a0 # Setup exit value before too late
50 subu t0, zero, a0 # Unaligned address?
54 SWHI a1, 0(a0) # Yes, handle first unaligned part
55 addu a0, t0 # Now both a0 and a2 are updated
61 addu a3, a0 # a3 is last loop address +1
64 addiu a0, 8 # Handle 2 words pr. iteration
65 sw a1, -8(a0)
66 bne a0, a3, .Lloopw
67 sw a1, -4(a0)
[all...] |
| /external/clang/test/CXX/special/class.inhctor/ |
| p8.cpp | 14 constexpr A a0{0};
21 static_assert(a0.rval && !a1.rval && b0.rval && !b1.rval, "");
|
| /ndk/sources/cxx-stl/llvm-libc++/test/utilities/function.objects/refwrap/refwrap.invoke/ |
| invoke_int_0.pass.cpp | 52 A_int_0 a0; local
53 std::reference_wrapper<A_int_0> r1(a0);
|
