/dalvik/vm/mterp/armv5te/ |
OP_INVOKE_SUPER.S | 10 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */ 16 FETCH(r1, 1) @ r1<- BBBB
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OP_SGET_WIDE.S | 9 /* sget-wide vAA, field@BBBB */ 11 FETCH(r1, 1) @ r1<- field ref BBBB 33 * r1: BBBB field ref
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OP_SPUT_OBJECT.S | 11 /* op vAA, field@BBBB */ 13 FETCH(r1, 1) @ r1<- field ref BBBB 38 * r1: BBBB field ref
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OP_SPUT_WIDE.S | 9 /* sput-wide vAA, field@BBBB */ 11 FETCH(r1, 1) @ r1<- field ref BBBB 33 * r1: BBBB field ref
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OP_EXECUTE_INLINE.S | 16 /* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */ 18 FETCH(r10, 1) @ r10<- BBBB
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OP_EXECUTE_INLINE_RANGE.S | 14 /* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */ 16 FETCH(r10, 1) @ r10<- BBBB
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OP_INSTANCE_OF.S | 37 * r1 holds class resolved from BBBB 69 * r3 holds BBBB 75 mov r1, r3 @ r1<- BBBB
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OP_FILLED_NEW_ARRAY.S | 10 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */ 12 FETCH(r1, 1) @ r1<- BBBB
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/dalvik/vm/mterp/mips/ |
OP_INSTANCE_OF.S | 54 * a1 holds class resolved from BBBB 65 * a3 holds BBBB 71 move a1, a3 # a1 <- BBBB
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OP_INVOKE_STATIC.S | 10 # op {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */ 12 FETCH(a1, 1) # a1 <- BBBB
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OP_INVOKE_SUPER.S | 10 # op vAA, {vCCCC..v(CCCC+AA-1)}, meth /* BBBB */ 16 FETCH(a1, 1) # a1 <- BBBB
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OP_SPUT_WIDE.S | 9 # sput-wide vAA, field /* BBBB */ 11 FETCH(a1, 1) # a1 <- field ref BBBB 33 * a1: BBBB field ref
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OP_EXECUTE_INLINE.S | 16 /* [opt] execute-inline vAA, {vC, vD, vE, vF}, inline@BBBB */ 18 FETCH(rBIX, 1) # rBIX <- BBBB
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OP_EXECUTE_INLINE_RANGE.S | 14 /* [opt] execute-inline/range {vCCCC..v(CCCC+AA-1)}, inline@BBBB */ 16 FETCH(rBIX, 1) # rBIX<- BBBB
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OP_FILLED_NEW_ARRAY.S | 10 # op {vCCCC..v(CCCC+AA-1)}, type /* BBBB */ 12 FETCH(a1, 1) # a1 <- BBBB
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/dalvik/vm/mterp/x86/ |
OP_INSTANCE_OF.S | 35 * ecx holds class resolved from BBBB 71 * rIBASE holds BBBB 75 movl rIBASE,OUT_ARG1(%esp) # arg1<- BBBB
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OP_NEW_INSTANCE.S | 12 /* new-instance vAA, class@BBBB */ 14 movzwl 2(rPC),%eax # eax<- BBBB
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/dalvik/vm/mterp/out/ |
InterpAsm-x86.S | 356 movw 2(rPC),rINSTw # rINSTw <= BBBB 357 GET_VREG_R rINST rINST # rINST- fp[BBBB] 368 movzwl 4(rPC),%ecx # ecx<- BBBB 397 movzwl 2(rPC),%ecx # ecx<- BBBB 399 GET_VREG_WORD rINST %ecx 0 # rINST<- v[BBBB+0] 400 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1] 412 movzwl 4(rPC),%ecx # ecx<- BBBB 414 GET_VREG_WORD rINST %ecx 0 # rINSTw_WORD<- v[BBBB+0] 415 GET_VREG_WORD %ecx %ecx 1 # ecx<- v[BBBB+1] 445 movw 2(rPC),rINSTw # rINSTw <= BBBB [all...] |
InterpAsm-mips.S | 540 FETCH(a1, 1) # a1 <- BBBB 543 GET_VREG(a2, a1) # a2 <- fp[BBBB] 554 FETCH(a1, 2) # a1 <- BBBB 557 GET_VREG(a2, a1) # a2 <- fp[BBBB] 585 FETCH(a3, 1) # a3 <- BBBB 587 EAS2(a3, rFP, a3) # a3 <- &fp[BBBB] 589 LOAD64(a0, a1, a3) # a0/a1 <- fp[BBBB] 602 FETCH(a3, 2) # a3 <- BBBB 604 EAS2(a3, rFP, a3) # a3 <- &fp[BBBB] 606 LOAD64(a0, a1, a3) # a0/a1 <- fp[BBBB] [all...] |
InterpAsm-armv5te-vfp.S | 398 FETCH(r1, 1) @ r1<- BBBB 401 GET_VREG(r2, r1) @ r2<- fp[BBBB] 412 FETCH(r1, 2) @ r1<- BBBB 415 GET_VREG(r2, r1) @ r2<- fp[BBBB] 443 FETCH(r3, 1) @ r3<- BBBB 445 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 447 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] 459 FETCH(r3, 2) @ r3<- BBBB 461 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 463 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] [all...] |
InterpAsm-armv5te.S | 398 FETCH(r1, 1) @ r1<- BBBB 401 GET_VREG(r2, r1) @ r2<- fp[BBBB] 412 FETCH(r1, 2) @ r1<- BBBB 415 GET_VREG(r2, r1) @ r2<- fp[BBBB] 443 FETCH(r3, 1) @ r3<- BBBB 445 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 447 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] 459 FETCH(r3, 2) @ r3<- BBBB 461 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 463 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] [all...] |
InterpAsm-armv7-a-neon.S | 411 FETCH(r1, 1) @ r1<- BBBB 414 GET_VREG(r2, r1) @ r2<- fp[BBBB] 425 FETCH(r1, 2) @ r1<- BBBB 428 GET_VREG(r2, r1) @ r2<- fp[BBBB] 455 FETCH(r3, 1) @ r3<- BBBB 457 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 459 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] 471 FETCH(r3, 2) @ r3<- BBBB 473 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 475 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] [all...] |
InterpAsm-armv7-a.S | 411 FETCH(r1, 1) @ r1<- BBBB 414 GET_VREG(r2, r1) @ r2<- fp[BBBB] 425 FETCH(r1, 2) @ r1<- BBBB 428 GET_VREG(r2, r1) @ r2<- fp[BBBB] 455 FETCH(r3, 1) @ r3<- BBBB 457 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 459 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] 471 FETCH(r3, 2) @ r3<- BBBB 473 add r3, rFP, r3, lsl #2 @ r3<- &fp[BBBB] 475 ldmia r3, {r0-r1} @ r0/r1<- fp[BBBB] [all...] |
/dalvik/vm/compiler/codegen/arm/ |
CodegenDriver.cpp | [all...] |
/dalvik/vm/compiler/codegen/mips/ |
CodegenDriver.cpp | [all...] |