| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 350 BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr);
357 BuildMI(BB, dl, TII->get(BinOpcode), scratch)
360 BuildMI(BB, dl, TII->get(BinOpcode), scratch)
368 BuildMI(BB, dl, TII->get(strOpc), stxr_status).addReg(scratch).addReg(ptr);
369 BuildMI(BB, dl, TII->get(AArch64::CBNZw))
443 BuildMI(BB, dl, TII->get(ldrOpc), dest).addReg(ptr);
447 BuildMI(BB, dl, TII->get(CmpOp))
450 BuildMI(BB, dl, TII->get(Size == 8 ? AArch64::CSELxxxc : AArch64::CSELwwwc),
457 BuildMI(BB, dl, TII->get(strOpc), stxr_status)
459 BuildMI(BB, dl, TII->get(AArch64::CBNZw)
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600InstrInfo.cpp | 318 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB);
326 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
336 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
339 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB);
655 MachineInstrBuilder MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opcode),
|
| R600ExpandSpecialInstrs.cpp | 100 BuildMI(MBB, I, MBB.findDebugLoc(I),
|
| SIInsertWaits.cpp | 290 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
|
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 292 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
299 MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID2)
|
| Thumb2ITBlockPass.cpp | 181 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
|
| Thumb2SizeReduction.cpp | 467 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc));
528 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(),
691 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
788 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
[all...] |
| ARMBaseRegisterInfo.cpp | 377 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
558 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonNewValueJump.cpp | 608 NewMI = BuildMI(*MBB, jmpPos, dl,
615 NewMI = BuildMI(*MBB, jmpPos, dl,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 235 BuildMI(EntryBB, IP, dl, TII.get(PPC::MFVRSAVE), InVRSAVE);
236 BuildMI(EntryBB, IP, dl, TII.get(PPC::UPDATE_VRSAVE),
238 BuildMI(EntryBB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(UpdatedVRSAVE);
252 BuildMI(*BB, IP, dl, TII.get(PPC::MTVRSAVE)).addReg(InVRSAVE);
271 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR));
272 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR), GlobalBaseReg);
275 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MovePCtoLR8));
276 BuildMI(FirstMBB, MBBI, dl, TII.get(PPC::MFLR8), GlobalBaseReg);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeDelaySlotFiller.cpp | 242 BuildMI(MBB, ++J, I->getDebugLoc(), TII->get(MBlaze::NOP));
|
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 110 MachineInstrBuilder MIB = BuildMI(*MBB.getParent(), FirstMI->getDebugLoc(),
|
| MachineRegisterInfo.cpp | 324 BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(),
|
| MachineSSAUpdater.cpp | 118 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
|
| TailDuplication.cpp | 827 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
888 Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
[all...] |
| GCStrategy.cpp | 357 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
|
| PeepholeOptimizer.cpp | 284 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
|
| StrongPHIElimination.cpp | 695 MachineInstr *CopyInstr = BuildMI(*PredBB,
764 MachineInstr *CopyInstr = BuildMI(*MBB,
|
| TwoAddressInstructionPass.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 778 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), Reg)
787 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), VRBase)
[all...] |
| FunctionLoweringInfo.cpp | 176 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
|
| SelectionDAGISel.cpp | 419 BuildMI(*EntryMBB, ++InsertPos, MI->getDebugLoc(),
440 BuildMI(*MF, CopyUseMI->getDebugLoc(),
818 BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), II)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 517 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
