/external/webkit/Source/JavaScriptCore/wtf/ |
StackBounds.cpp | 259 MOV EAX, FS:[18h] 260 MOV pTib, EAX
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
Dot_p_neon.s | 113 MOV r4, r12 118 MOV r0, r12, LSL r10 @ L_sum = L_sum << sft
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scale_sig_neon.s | 34 MOV r4, #4 37 MOV r5, r0 @ copy x[] address
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residu_asm_neon.s | 43 MOV r8, r9
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.s | 181 MOV r0, #OMX_Sts_NoErr 194 MOV r0, #OMX_Sts_NoErr
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omxVCM4P10_InterpolateLuma_s.s | 300 MOV pSrcBK, pSrc 343 MOV pSrcBK, pSrc 463 MOV pSrcBK, pSrc 506 MOV pSrcBK, pSrc 546 MOV r0, #0
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omxVCM4P10_PredictIntra_4x4_s.s | 231 MOV return, #OMX_Sts_NoErr 245 MOV return, #OMX_Sts_NoErr ;// returnNoError 264 MOV return, #OMX_Sts_NoErr 279 MOV return, #OMX_Sts_NoErr 523 MOV return, #OMX_Sts_NoErr
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omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s | 260 MOV r0, #OMX_Sts_NoErr 273 MOV r0, #OMX_Sts_NoErr
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omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 168 MOV Mask_0,#0 277 MOV r0, #OMX_Sts_NoErr
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omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 214 MOV Mask_0,#0 427 MOV r0, #OMX_Sts_NoErr
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
h264bsd_interpolate_hor_ver_quarter.s | 131 MOV x0, #0 148 MOV tmpa, #2 159 MOV count, width 168 MOV plus16, #16 ;// constant for add 208 MOV tmp5, tmp5, ASR #5 209 MOV tmp4, tmp4, ASR #5 244 MOV tmp5, tmp5, ASR #5 245 MOV tmp4, tmp4, ASR #5
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h264bsd_interpolate_ver_quarter.s | 122 MOV x0, #0 364 MOV tmp2, #1
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
omxVCM4P10_InterpolateLuma_s.S | 113 MOV r8,r0 149 MOV r8,r0 248 MOV r8,r0 285 MOV r8,r0 316 MOV r0,#0
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/external/llvm/lib/Target/R600/ |
R600InstrInfo.cpp | 56 buildDefaultInstruction(MBB, MI, AMDGPU::MOV, 68 MachineInstr *NewMI = buildDefaultInstruction(MBB, MI, AMDGPU::MOV, 77 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::MOV), DebugLoc()); 96 case AMDGPU::MOV: 619 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV, 622 setImmOperand(Mov, R600Operands::DST_REL, 1); 623 return Mov; 635 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV, [all...] |
AMDGPUIndirectAddressing.cpp | 14 /// to either a COPY or a MOV that uses indirect addressing. 113 MachineInstrBuilder MOV = TII->buildIndirectWrite(BB, I, 120 MOV.addReg(DstReg, RegState::Define | RegState::Implicit); 301 MachineInstrBuilder Mov = TII->buildIndirectRead(BB, I, 308 Mov.addReg(IndirectReg, RegState::Implicit | RegState::Kill); 309 Mov.addReg(LiveAddressRegisterMap[Address], RegState::Implicit);
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/frameworks/av/media/libstagefright/codecs/amrnb/common/include/ |
basic_op_arm_v5.h | 403 MOV product, product, ASR #15
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/comm/src/ |
omxVCCOMM_Copy16x16_s.s | 140 MOV Return,#OMX_Sts_NoErr
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
armVCM4P10_DeblockingLuma_unsafe_s.s | 143 MOV m00, #0 329 MOV t4, #0
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armVCM4P10_TransformResidual4x4_s.s | 150 MOV constZero,#0 ;// Used to right shift by 1 336 MOV const2,#0x200 ;// const2 = 2^9
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armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.s | 83 MOV Counter, #2
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armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s | 101 MOV Counter, #2
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/external/qemu/distrib/sdl-1.2.15/src/video/riscos/ |
SDL_riscosASM.S | 46 MOV lr,a1
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/external/tremolo/Tremolo/ |
floor1ARM.s | 47 MOV r12,r13
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/external/v8/src/arm/ |
constants-arm.h | 204 MOV = 13 << 21, // Move. 456 // mov lr, pc
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/external/webkit/Source/JavaScriptCore/assembler/ |
ARMAssembler.h | 138 MOV = (0xd << 21), 393 emitInst(static_cast<ARMWord>(cc) | MOV, rd, ARMRegisters::r0, op2); 412 emitInst(static_cast<ARMWord>(cc) | MOV | SET_CC, rd, ARMRegisters::r0, op2);
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