| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 111 AMDGPU::MOV,
120 AMDGPU::MOV,
129 AMDGPU::MOV,
154 MachineInstr *NewMI = TII->buildDefaultInstruction(*BB, MI, AMDGPU::MOV,
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/ |
| h264bsd_interpolate_ver_half.s | 123 MOV x0, #0
|
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssemblerInterface.h | 244 MOV(int cc, int s, int Rd, uint32_t Op2) {
|
| ARMAssembler.cpp | 160 MOV(AL, 0, R0, R0); // NOP
|
| /external/llvm/test/MC/ARM/ |
| basic-thumb-instructions.s | 372 @ MOV (immediate)
384 @ MOV (register)
386 mov r3, r4
389 @ CHECK: mov r3, r4 @ encoding: [0x23,0x46]
|
| diagnostics.s | 133 @ Out of range immediate for MOV
|
| basic-arm-instructions.s | 301 @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1]
[all...] |
| basic-thumb2-instructions.s | [all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p2/src/ |
| omxVCM4P2_MCReconBlock_s.s | 437 MOV return, #OMX_Sts_NoErr
|
| /external/valgrind/main/none/tests/mips32/ |
| MoveIns.stdout.exp | 57 MOV.S
58 mov.s $f0, $f0 :: fs 0.000000, rt 0x0
59 mov.s $f0, $f1 :: fs 456.248962, rt 0x43e41fde
60 mov.s $f1, $f2 :: fs 3.000000, rt 0x40400000
61 mov.s $f2, $f3 :: fs -1.000000, rt 0xbf800000
62 mov.s $f3, $f4 :: fs 1384.599976, rt 0x44ad1333
63 mov.s $f4, $f5 :: fs -7.294568, rt 0xc0e96d19
64 mov.s $f5, $f6 :: fs 1000000000.000000, rt 0x4e6e6b28
65 mov.s $f6, $f7 :: fs -5786.470215, rt 0xc5b4d3c3
66 mov.s $f7, $f8 :: fs 1752.000000, rt 0x44db000
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
| armCOMM_s.h | 904 MOV sp, sp
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
| armCOMM_s.h | 907 MOV sp, sp
|
| /external/v8/src/arm/ |
| assembler-arm.cc | 250 // mov lr, pc
251 const Instr kMovLrPc = al | MOV | kRegister_pc_Code | kRegister_lr_Code * B12;
799 // constant pool is required. For a mov instruction not setting the
801 if ((instr & ~kCondMask) == 13*B21) { // mov, S not set
804 // mov instruction will be an ldr from constant pool (one instruction).
807 // mov instruction will be a mov or movw followed by movt (two
812 // If this is not a mov or mvn instruction there will always an additional
813 // instructions - either mov or ldr. The mov might actually be tw
[all...] |
| macro-assembler-arm.cc | 79 mov(pc, Operand(target), LeaveCC, cond);
87 mov(ip, Operand(target, rmode));
90 mov(pc, Operand(target, rmode), LeaveCC, cond);
128 mov(lr, Operand(pc), LeaveCC, cond);
129 mov(pc, Operand(target), LeaveCC, cond);
138 Instr mov_instr = cond | MOV | LeaveCC;
160 // address is loaded. The mov method will automatically record
165 mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
171 mov(lr, Operand(pc), LeaveCC, cond);
173 mov(pc, Operand(reinterpret_cast<int32_t>(target), rmode), LeaveCC, cond)
[all...] |
| simulator-arm.cc | [all...] |
| /dalvik/vm/compiler/codegen/x86/libenc/ |
| enc_tabl.cpp | [all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intARM.stdout.exp | 0 MOV
2 mov r0, r1 :: rd 0x00000001 rm 0x00000001, carryin 0, cpsr 0x00000000
4 mov r0, #0 :: rd 0x00000000 rm 0x00000000, carryin 0, cpsr 0x00000000
5 mov r0, #1 :: rd 0x00000001 rm 0x00000000, carryin 0, cpsr 0x00000000
[all...] |
| v6intThumb.stdout.exp | [all...] |
