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  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
armVCM4P10_DecodeCoeffsToPair_s.S 28 ORR r9,r9,r8,LSL #8
29 ORR r11,r9,r11,LSL #16
95 ORR r11,r8,r11,LSL #8
119 ORR r11,r8,r11,LSL #8
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/source/arm11_asm/
h264bsd_interpolate_ver_half.s 192 ORR res, res, tmpa
236 ORR res, res, tmpa
284 ORR res, res, tmpa
330 ORR res, res, tmpa
h264bsd_interpolate_ver_quarter.s 194 ORR res, res, tmpa
246 ORR res, res, tmpa
296 ORR res, res, tmpa
345 ORR res, res, tmpa
h264bsd_interpolate_hor_half.s 198 ORR tmp1, tmp1, tmp2, LSL #8
234 ORR tmp1, tmp1, tmp2, LSL #8
h264bsd_interpolate_hor_ver_quarter.s 216 ORR tmp4, tmp4, tmp5, LSL #8
252 ORR tmp4, tmp4, tmp5, LSL #8
357 ORR res, res, tmpa
409 ORR res, res, tmpa
459 ORR res, res, tmpa
508 ORR res, res, tmpa
h264bsd_interpolate_hor_quarter.s 203 ORR tmp1, tmp1, tmp2, LSL #8
249 ORR tmp1, tmp1, tmp2, LSL #8
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/
armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.s 139 ORR Acc0, Acc0, Acc1, LSL #8
161 ORR Acc2, Acc2, Acc3, LSL #8
armVCM4P10_InterpolateLuma_HalfVer4x4_unsafe_s.s 165 ORR Acc0, Acc0, Acc1, LSL #8 ;// [a3 a2 a1 a0]
170 ORR Acc2, Acc2, Acc3, LSL #8 ;// [b3 b2 b1 b0]
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s 83 ORR rowLuma01,rowLuma01,temp3,LSL #16 ;// rowLuma01 = [0b|0a]
453 ORR sum1,sum1,sum2,LSL #8 ;// sum1 = [dcba]
omxVCM4P10_FilterDeblockingChroma_HorEdge_I_s.s 262 ORR tC, tC0, tC1, LSL #16
266 ORR tC, tC, LSL #8
omxVCM4P10_FilterDeblockingChroma_VerEdge_I_s.s 343 ORR tC, tC1, tC0, LSL #16
347 ORR tC, tC, LSL #8
armVCM4P10_DeblockingLuma_unsafe_s.s 289 ORR t9, apqflg, m01
omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s 231 ORR apqflg, apflg, t1, LSL #1
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s 329 ORR apqflg, apflg, t1, LSL #1
  /system/core/libpixelflinger/codeflinger/
texturing.cpp 834 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift));
849 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift));
863 ORR(AL, 0, pixel, pixel, reg_imm(pixel, LSL, shift));
    [all...]
GGLAssembler.cpp 381 ORR(AL, 0, parts.count.reg, tx, reg_imm(parts.count.reg, LSL, 16));
839 case GGL_OR: ORR(AL, 0, pixel.reg, s.reg, d.reg); break;
840 case GGL_NOR: ORR(AL, 0, pixel.reg, s.reg, d.reg);
    [all...]
ARMAssemblerInterface.h 252 ORR(int cc, int s, int Rd, int Rn, uint32_t Op2) {
  /external/v8/src/arm/
constants-arm.h 203 ORR = 12 << 21, // Logical (inclusive) OR.
  /external/webkit/Source/JavaScriptCore/assembler/
ARMAssembler.h 137 ORR = (0xc << 21),
383 emitInst(static_cast<ARMWord>(cc) | ORR, rd, rn, op2);
388 emitInst(static_cast<ARMWord>(cc) | ORR | SET_CC, rd, rn, op2);
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/
armCOMM_IDCT_s.h 613 ORR xf0, xf0, xf1, LSL #8 ;// [ b1 b0 a1 a0 ]
614 ORR xf2, xf2, xf3, LSL #8 ;// [ b3 b2 a3 a2 ]
615 ORR xf4, xf4, xf5, LSL #8 ;// [ b5 b4 a5 a4 ]
616 ORR xf6, xf6, xf7, LSL #8 ;// [ b7 b6 a7 a6 ]
    [all...]
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/
armCOMM_IDCT_s.h 619 ORR xf0, xf0, xf1, LSL #8 ;// [ b1 b0 a1 a0 ]
620 ORR xf2, xf2, xf3, LSL #8 ;// [ b3 b2 a3 a2 ]
621 ORR xf4, xf4, xf5, LSL #8 ;// [ b5 b4 a5 a4 ]
622 ORR xf6, xf6, xf7, LSL #8 ;// [ b7 b6 a7 a6 ]
    [all...]
  /external/tremolo/Tremolo/
bitwiseARM.s 108 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
304 ORR r10,r10,r12,LSL r5 @ r10= first r5+8 bits
dpen.s 145 ORR r0, r14,r10,LSL #8 @ r7 = chase = (next<<8) | r14
205 ORR r0, r14,r10,LSL #16 @ r7 = chase = (next<<16) | r14
mdctLARM.s 998 ORR r7, r7, r8, LSL #6 @ r7 = bitrev[bit]
  /external/llvm/test/MC/ARM/
basic-thumb-instructions.s 421 @ ORR

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