| /external/llvm/lib/Target/MBlaze/ |
| MBlazeAsmPrinter.cpp | 127 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
144 CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getFrameRegister(*MF)));
147 CPUBitmask |= (1 << getMBlazeRegisterNumbering(RI.getRARegister()));
158 const TargetRegisterInfo &RI = *TM.getRegisterInfo();
159 unsigned stkReg = RI.getFrameRegister(*MF);
160 unsigned retReg = RI.getRARegister();
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| MBlazeInstrInfo.h | 171 const MBlazeRegisterInfo RI;
179 virtual const MBlazeRegisterInfo &getRegisterInfo() const { return RI; }
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| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 254 VirtRegInfo RI = { false, false, false };
266 RI.Reads = true;
268 RI.Tied = true;
273 RI.Writes = true;
274 else if (!RI.Tied && MO.getParent()->isRegTiedToDefOperand(getOperandNo()))
275 RI.Tied = true;
277 return RI;
|
| StackProtector.cpp | 266 ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator());
267 if (!RI) continue;
278 PointerType *PtrTy = Type::getInt8PtrTy(RI->getContext());
282 ConstantInt::get(Type::getInt32Ty(RI->getContext()), Offset);
328 BasicBlock *NewBB = BB->splitBasicBlock(RI, "SP_return");
|
| GCStrategy.cpp | 391 for (GCFunctionInfo::roots_iterator RI = FI->roots_begin();
392 RI != FI->roots_end();) {
394 if (MF.getFrameInfo()->isDeadObjectIndex(RI->Num)) {
395 RI = FI->removeStackRoot(RI);
397 RI->StackOffset = TFI->getFrameIndexOffset(MF, RI->Num);
398 ++RI;
|
| LiveIntervalAnalysis.cpp | 530 for (LiveInterval::iterator RI = LI->begin(), RE = LI->end(); RI != RE;
531 ++RI) {
533 if (RI->end.isBlock())
535 MachineInstr *MI = getInstructionFromIndex(RI->end);
539 // Check if any of the reguints are live beyond the end of RI. That could
553 I = RInt->advanceTo(I, RI->end);
554 if (I == RInt->end() || I->start >= RI->end)
556 // I is overlapping RI.
[all...] |
| LexicalScopes.cpp | 248 for (SmallVectorImpl<InsnRange>::const_iterator RI = MIRanges.begin(),
249 RE = MIRanges.end(); RI != RE; ++RI) {
250 const InsnRange &R = *RI;
|
| /external/llvm/lib/Analysis/ |
| RegionPass.cpp | 34 RI = NULL;
54 RI = &getAnalysis<RegionInfo>();
60 addRegionIntoQueue(RI->getTopLevelRegion(), RQ);
148 RI->clearNodeCache();
161 RI->dump();
|
| RegionInfo.cpp | 57 : RegionNode(Parent, Entry, 1), RI(RInfo), DT(dt), exit(Exit) {}
242 for (Region::const_iterator RI = begin(), RE = end(); RI != RE; ++RI)
243 (*RI)->verifyRegionNest();
265 Region *R = RI->getRegionFor(BB);
330 RI->setRegionFor(BB, SubRegion);
375 Region *R = RI->getRegionFor(exit);
379 return new Region(getEntry(), *succ_begin(exit), RI, DT);
393 return new Region(getEntry(), R->getExit(), RI, DT)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.h | 69 const PPCRegisterInfo RI;
88 virtual const PPCRegisterInfo &getRegisterInfo() const { return RI; }
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUAsmPrinter.cpp | 65 const SIRegisterInfo * RI =
128 hwReg = RI->getEncodingValue(reg) & 0xff;
|
| AMDGPUInstrInfo.cpp | 31 : AMDGPUGenInstrInfo(0,0), RI(tm, *this), TM(tm) { }
34 return RI;
251 const AMDGPURegisterInfo & RI = getRegisterInfo();
259 const TargetRegisterClass * newRegClass = RI.getISARegClass(oldRegClass);
|
| SIInstrInfo.cpp | 27 RI(tm, *this)
31 return RI;
132 get(Opcode), RI.getSubReg(DestReg, SubIdx));
134 Builder.addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc));
|
| SIInstrInfo.h | 26 const SIRegisterInfo RI;
|
| AMDGPUIndirectAddressing.cpp | 191 for (std::vector<unsigned>::const_iterator RI = PhiRegisters.begin(),
193 RI != RE; ++RI) {
194 unsigned Reg = *RI;
|
| /external/llvm/include/llvm/Analysis/ |
| RegionPass.h | 87 RegionInfo *RI;
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.h | 23 const MipsSERegisterInfo RI;
|
| Mips16InstrInfo.h | 23 const Mips16RegisterInfo RI;
|
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| RuntimeDyld.cpp | 157 ObjRelocationInfo RI;
158 RI.SectionID = SectionID;
159 Check(i->getAdditionalInfo(RI.AdditionalInfo));
160 Check(i->getOffset(RI.Offset));
161 Check(i->getSymbol(RI.Symbol));
162 Check(i->getType(RI.Type));
164 DEBUG(dbgs() << "\t\tAddend: " << RI.AdditionalInfo
165 << " Offset: " << format("%p", (uintptr_t)RI.Offset)
166 << " Type: " << (uint32_t)(RI.Type & 0xffffffffL)
168 processRelocationRef(RI, *obj, LocalSections, LocalSymbols, Stubs)
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| InlineFunction.cpp | 85 void forwardResume(ResumeInst *RI);
143 void InvokeInliningInfo::forwardResume(ResumeInst *RI) {
145 BasicBlock *Src = RI->getParent();
153 InnerEHValuesPHI->addIncoming(RI->getOperand(0), Src);
154 RI->eraseFromParent();
253 if (ResumeInst *RI = dyn_cast<ResumeInst>(BB->getTerminator()))
254 Invoke.forwardResume(RI);
691 for (unsigned ri = 0, re = Returns.size(); ri != re; ++ri) {
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 29 const HexagonRegisterInfo RI;
38 virtual const HexagonRegisterInfo &getRegisterInfo() const { return RI; }
|
| /external/llvm/tools/llvm-objdump/ |
| COFFDump.cpp | 255 for (relocation_iterator RI = SI->begin_relocations(),
257 RI != RE; RI.increment(ec)) {
259 Rels.push_back(*RI);
|
| /external/llvm/lib/Transforms/IPO/ |
| IPConstantPropagation.cpp | 179 if (ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator())) {
189 V = RI->getOperand(0);
191 V = FindInsertedValue(RI->getOperand(0), i);
|
| DeadArgumentElimination.cpp | 424 if (const ReturnInst *RI = dyn_cast<ReturnInst>(V)) {
429 RetOrArg Use = CreateRet(RI->getParent()->getParent(), RetValNum);
523 if (const ReturnInst *RI = dyn_cast<ReturnInst>(BB->getTerminator()))
524 if (RI->getNumOperands() != 0 && RI->getOperand(0)->getType()
[all...] |
| /external/clang/lib/Lex/ |
| PreprocessingRecord.cpp | 285 for (pp_iter RI = PreprocessedEntities.end(),
287 RI != Begin && count < 4; --RI, ++count) {
288 pp_iter I = RI;
292 pp_iter insertI = PreprocessedEntities.insert(RI, Entity);
|
