| /external/valgrind/main/exp-dhat/ |
| dh_main.c | 142 tl_assert(foundval == 0); // we don't store vals in the interval tree
785 // Store(&g_guest_instrs_executed, t2)
934 IRExpr* data = st->Ist.Store.data;
935 IRExpr* aexpr = st->Ist.Store.addr;
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 62 // Some atomic operations can be folded into load-acquire or store-release
603 // We need somewhere to store the f128 value needed.
847 SDValue Store = DAG.getStore(Val.getValue(1), DL, Val, FIN,
850 MemOps.push_back(Store);
[all...] |
| /external/valgrind/main/VEX/priv/ |
| host_mips_isel.c | 281 //store old FCSR to stack
349 // store hi,lo as Ity_I32's
[all...] |
| host_ppc_defs.h | 465 Pin_Store, /* store a 8|16|32|64 bit value to mem */
466 Pin_StoreC, /* store-conditional (stwcx./stdcx.) 32|64 bit val */
474 Pin_FpLdSt, /* FP load/store */
484 Pin_AvLdSt, /* AV load/store (kludging for AMode_IR) */
664 } Store;
665 /* Store-conditional (stwcx., stdcx.) */
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 299 /// ExpandUnalignedStore - Expands an unaligned store to 2 half-size stores.
316 // same size, then a (misaligned) int store.
324 // Do a (aligned) store to a stack slot, then copy from the stack slot
338 // Perform the original store, only redirected to the stack slot.
339 SDValue Store = DAG.getTruncStore(Chain, dl,
349 SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
352 // Store it to the final location. Remember the store.
364 // The last store may be partial. Do a truncating store. On big-endia
[all...] |
| /external/valgrind/main/cachegrind/ |
| cg_main.c | 455 load-op-store instructions (x86, amd64), the insn is treated as if
[all...] |
| /external/valgrind/main/callgrind/ |
| main.c | 207 load-op-store instructions (x86, amd64), the insn is treated as if
1017 IRExpr* data = st->Ist.Store.data;
1018 IRExpr* aexpr = st->Ist.Store.addr;
[all...] |
| /external/valgrind/main/memcheck/ |
| mc_translate.c | 82 3. As the address in a load or store. Because it could cause an
[all...] |
| /external/chromium/chrome/browser/chromeos/login/ |
| signed_settings.cc | 541 SignedSettingsTempStorage::Store(name_, value_,
|
| /external/llvm/lib/AsmParser/ |
| LLLexer.cpp | 673 INSTKEYWORD(store, Store);
|
| /external/llvm/lib/Transforms/Vectorize/ |
| LoopVectorize.cpp | 203 /// Vectorize Load and Store instructions,
421 /// respective Store/Load instruction(s) to calculate aliasing.
449 /// This check allows us to vectorize A[idx] into a wide load/store.
503 /// Return the AA location for a load or a store.
615 /// Returns whether the instruction is a load or store and will be a emitted
[all...] |
| /external/v8/src/x64/ |
| macro-assembler-x64.h | 117 // Special case code for load and store to take advantage of
123 void Store(ExternalReference destination, Register source);
316 // Store the value in register src in the safepoint register stack
372 // Store the function for the given builtin in the target register.
375 // Store the code object for the given builtin in the target register.
[all...] |
| macro-assembler-x64.cc | 97 void MacroAssembler::Store(ExternalReference destination, Register source) {
211 // Load store buffer top.
213 // Store pointer to buffer.
818 // We don't allow a GC during a store buffer overflow so there is no need to
819 // store the registers in any particular way, but we do have to store and
[all...] |
| code-stubs-x64.cc | [all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_ir.h | 248 /* IREndness is used in load IRExprs and store IRStmts. */
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 215 // MIPS doesn't have extending float->double load/store
257 setOperationAction(ISD::STORE, MVT::i64, Custom);
[all...] |
| /external/clang/lib/CodeGen/ |
| CGClass.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 139 setOperationAction(ISD::STORE, MVT::i32, Custom);
164 setTargetDAGCombine(ISD::STORE);
180 case ISD::STORE: return LowerSTORE(Op, DAG);
506 assert(!ST->isTruncatingStore() && "Unexpected store type");
507 assert(ST->getMemoryVT() == MVT::i32 && "Unexpected store EVT");
513 // Leave aligned store alone.
771 // Store the incremented VAList to the legalized pointer
[all...] |
| /external/v8/tools/ |
| tickprocessor.js | 44 /^(?:CallIC|LoadIC|StoreIC)|(?:Builtin: (?:Keyed)?(?:Call|Load|Store)IC_)/;
|
| /external/valgrind/main/exp-sgcheck/ |
| sg_main.c | 447 /* no. clone it, store the clone and return the clone's
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 632 // Default all indexed load / store to expand.
[all...] |
| /external/libvpx/libvpx/vp8/common/ppc/ |
| loopfilter_filters_altivec.asm | 1132 stvx v1, r5, r3 ;# store P0
1133 stvx v2, 0, r3 ;# store Q0
1168 ;# Store 4 pels at word "Offs" in temp array, then advance r7
[all...] |
| /external/llvm/bindings/ocaml/llvm/ |
| llvm.ml | 171 | Store
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 424 // writes to memory. It's not safe to move the callee (a load) across a store.
481 // Lower fpround and fpextend nodes that target the FP stack to be store and
527 // FIXME: optimize the case where the src/dest is a load or store?
528 SDValue Store = CurDAG->getTruncStore(CurDAG->getEntryNode(), dl,
532 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, MemTmp,
[all...] |
| /external/valgrind/main/helgrind/ |
| hg_main.c | [all...] |
