| /external/stressapptest/src/ |
| os.h | 125 // Put mfence before and after clflush to make sure:
126 // 1. The write before the clflush is committed to memory bus;
127 // 2. The read after the clflush is hitting the memory bus.
130 // CLFLUSH is only ordered by the MFENCE instruction. It is not guaranteed
131 // to be ordered by any other fencing, serializing or other CLFLUSH
135 asm volatile("clflush (%0)" :: "r" (vaddr));
271 bool has_clflush_; // Do we have clflush instructions?
|
| os.cc | 160 logprintf(9, "Log: has clflush: %s, has sse2: %s\n",
|
| /external/elfutils/backends/ |
| i386_auxv.c | 43 "pat\0" "pse36\0" "pn\0" "clflush\0" "20\0" "dts\0" "acpi\0" "mmx\0"
|
| /external/kernel-headers/original/asm-x86/ |
| system_32.h | 164 static inline void clflush(volatile void *__p) function
166 asm volatile("clflush %0" : "+m" (*(char __force *)__p));
|
| cpufeature_32.h | 36 #define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */
|
| /external/openssl/crypto/perlasm/ |
| x86nasm.pl | 22 elsif ($opcode eq "clflush" && $#_==0)
|
| x86gas.pl | 48 elsif ($#_==1 && $opcode =~ m/^(call|clflush|j|loop|set)/o)
|
| /external/valgrind/main/exp-bbv/tests/amd64-linux/ |
| ll.S | 587 .ascii "flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc pebs bts pni dtes64 monitor ds_cpl vmx est cid cx16 xtpr pdcm lahf_lm tpr_shadow\n"
589 .ascii "clflush size : 64\n"
612 .ascii "flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm constant_tsc pebs bts pni dtes64 monitor ds_cpl vmx est cid cx16 xtpr pdcm lahf_lm tpr_shadow\n"
614 .ascii "clflush size : 64\n"
|
| /external/chromium/base/ |
| atomicops_internals_x86_gcc.h | 219 // x86 stores/loads fail to act as barriers for a few instructions (clflush
|
| /external/v8/src/ |
| atomicops_internals_x86_gcc.h | 241 // x86 stores/loads fail to act as barriers for a few instructions (clflush
|
| /external/valgrind/main/VEX/pub/ |
| libvex_guest_mips32.h | 135 /* For clflush: record start and length of area to invalidate */
|
| libvex_guest_arm.h | 98 /* For clflush: record start and length of area to invalidate */
|
| libvex_guest_x86.h | 203 /* For clflush: record start and length of area to invalidate */
|
| /external/valgrind/main/docs/internals/ |
| 3_1_BUGSTATUS.txt | 99 vx1533 vx1590 118239 amd64: 0xF 0xAE 0x3F (clflush)
|
| /external/oprofile/events/x86-64/family11h/ |
| events | 76 event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CFLUSH : Retired CLFLUSH instructions
|
| /external/oprofile/events/x86-64/hammer/ |
| events | 34 event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH instructions
|
| /external/valgrind/main/VEX/priv/ |
| guest_mips_helpers.c | 139 /* For clflush: record start and length of area to invalidate */
|
| guest_amd64_helpers.c | [all...] |
| guest_x86_helpers.c | [all...] |
| /external/valgrind/main/exp-bbv/tests/x86-linux/ |
| ll.S | 587 .ascii "clflush size : 32\n"
|
| /external/qemu/target-i386/ |
| helper.c | 41 "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */, NULL, "ds" /* Intel dts */, "acpi", "mmx",
[all...] |
| /external/oprofile/events/x86-64/family10/ |
| events | 47 event:0x26 counters:0,1,2,3 um:zero minimum:500 name:RETIRED_CLFLUSH_INSTRUCTIONS : Retired CLFLUSH instructions
|
| /external/qemu-pc-bios/bochs/ |
| config.h.in | 771 // CLFLUSH was introduced together with SSE2 instruction set
|
| /external/llvm/test/MC/X86/ |
| x86-32-coverage.s | 512 // CHECK: clflush 3735928559(%ebx,%ecx,8)
513 clflush 0xdeadbeef(%ebx,%ecx,8)
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx-intrinsics-x86.ll | [all...] |
