/dalvik/vm/compiler/codegen/mips/ |
MipsLIR.h | 401 kMipsAddiu, /* addiu t,s,imm16 [001001] s[25..21] t[20..16] imm16[15..0] */ 404 kMipsAndi, /* andi t,s,imm16 [001100] s[25..21] t[20..16] imm16[15..0] */ 425 kMipsLahi, /* lui t,imm16 [00111100000] t[20..16] imm16[15..0] load addr hi */ 426 kMipsLalo, /* ori t,s,imm16 [001001] s[25..21] t[20..16] imm16[15..0] load addr lo */ 427 kMipsLui, /* lui t,imm16 [00111100000] t[20..16] imm16[15..0] * [all...] |
/external/valgrind/main/none/tests/x86/ |
insn_basic.def | 35 adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912] 36 adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913] 37 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912] 38 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913] 39 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912] 40 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913] 68 addw imm16[1234] ax.uw[5678] => 1.uw[6912] 69 addw imm16[1234] bx.uw[5678] => 1.uw[6912] 70 addw imm16[1234] m16.uw[5678] => 1.uw[6912] 88 andw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x0230 [all...] |
/external/llvm/lib/Target/Mips/ |
MipsInstrFormats.td | 138 bits<16> imm16; 144 let Inst{15-0} = imm16; 153 bits<16> imm16; 159 let Inst{15-0} = imm16; 213 bits<16> imm16; 220 let Inst{15-0} = imm16; 294 bits<16> imm16; 301 let Inst{15-0} = imm16; 359 bits<16> imm16; 366 let Inst{15-0} = imm16; [all...] |
Mips16InstrInfo.td | 109 FEXT_I16<eop, (outs), (ins brtarget:$imm16), 110 !strconcat(asmstr, "\t$imm16"),[], itin>; [all...] |
Mips16InstrFormats.td | 422 bits<16> imm16; 427 let Inst{26-21} = imm16{10-5}; 428 let Inst{20-16} = imm16{15-11}; 431 let Inst{4-0} = imm16{4-0}; 473 bits<16> imm16; 479 let Inst{26-21} = imm16{10-5}; 480 let Inst{20-16} = imm16{15-11}; 484 let Inst{4-0} = imm16{4-0}; 498 bits<16> imm16; 504 let Inst{26-21} = imm16{10-5} [all...] |
MipsInstrInfo.td | 374 InstSE<(outs RO:$rt), (ins RO:$rs, Od:$imm16), 375 !strconcat(opstr, "\t$rt, $rs, $imm16"), 376 [(set RO:$rt, (OpNode RO:$rs, imm_type:$imm16))], IIAlu, FrmI> { 414 InstSE<(outs RC:$rt), (ins Imm:$imm16), !strconcat(opstr, "\t$rt, $imm16"), 530 InstSE<(outs CPURegsOpnd:$rt), (ins RC:$rs, Od:$imm16), 531 !strconcat(opstr, "\t$rt, $rs, $imm16"), 532 [(set CPURegsOpnd:$rt, (cond_op RC:$rs, imm_type:$imm16))], [all...] |
/external/valgrind/main/none/tests/amd64/ |
insn_basic.def | 15 ###adcw eflags[0x1,0x0] : imm16[1234] ax.uw[5678] => 1.uw[6912] 16 ###adcw eflags[0x1,0x1] : imm16[1234] ax.uw[5678] => 1.uw[6913] 17 adcw eflags[0x1,0x0] : imm16[1234] bx.uw[5678] => 1.uw[6912] 18 adcw eflags[0x1,0x1] : imm16[1234] bx.uw[5678] => 1.uw[6913] 19 adcw eflags[0x1,0x0] : imm16[1234] m16.uw[5678] => 1.uw[6912] 20 adcw eflags[0x1,0x1] : imm16[1234] m16.uw[5678] => 1.uw[6913] 62 addw imm16[1234] ax.uw[5678] => 1.uw[6912] 63 addw imm16[1234] bx.uw[5678] => 1.uw[6912] 64 addw imm16[1234] m16.uw[5678] => 1.uw[6912] 89 andw imm16[0x4231] ax.uw[0x1234] => 1.uw[0x0230 [all...] |
/dalvik/vm/compiler/codegen/x86/libenc/ |
enc_tabl.cpp | 350 {OpcodeInfo::decoder, {Size16, opcode_starts_from + 5, iw}, {AX, imm16}, DU_U },\ 355 {OpcodeInfo::all, {Size16, 0x81, opc_ext, iw}, {r_m16, imm16}, def_use },\ [all...] |
enc_prvt.h | 199 #define imm16 {OpndKind_Imm, OpndSize_16, OpndExt_Any, RegName_Null} macro
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/external/valgrind/main/VEX/priv/ |
host_mips_defs.c | 948 MIPSRH *MIPSRH_Imm(Bool syned, UShort imm16) 953 op->Mrh.Imm.imm16 = imm16; 957 vassert(imm16 != 0x8000); 976 vex_printf("%d", (Int) (Short) op->Mrh.Imm.imm16); 978 vex_printf("%u", (UInt) (UShort) op->Mrh.Imm.imm16); [all...] |
host_ppc_defs.c | 396 PPCRH* PPCRH_Imm ( Bool syned, UShort imm16 ) { 400 op->Prh.Imm.imm16 = imm16; 404 vassert(imm16 != 0x8000); 419 vex_printf("%d", (Int)(Short)op->Prh.Imm.imm16); 421 vex_printf("%u", (UInt)(UShort)op->Prh.Imm.imm16); [all...] |
/external/llvm/lib/Target/MBlaze/ |
MBlazeInstrFormats.td | 49 // imm16 - 16-bit immediate value. 115 bits<16> imm16; 119 let Inst{16-31} = imm16; 157 let imm16 = rimm16;
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/external/llvm/lib/Target/PowerPC/ |
PPCJITInfo.cpp | 27 #define BUILD_ADDIS(RD,RS,IMM16) \ 28 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535)) 44 #define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
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/external/v8/src/ia32/ |
assembler-ia32.cc | 847 void Assembler::cmpw(const Operand& op, Immediate imm16) { 848 ASSERT(imm16.is_int16()); 853 emit_w(imm16); 1305 void Assembler::ret(int imm16) { 1307 ASSERT(is_uint16(imm16)); 1308 if (imm16 == 0) { 1312 EMIT(imm16 & 0xFF); 1313 EMIT((imm16 >> 8) & 0xFF); [all...] |
/external/v8/src/mips/ |
constants-mips.cc | 305 // 16 bits Immediate type instructions. e.g.: addi dest, src, imm16.
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assembler-mips.cc | 726 int32_t imm16 = imm18 >> 2; 727 ASSERT(is_int16(imm16)); 729 instr_at_put(pos, instr | (imm16 & kImm16Mask)); 1041 int32_t imm16 = imm18 >> 2; local 1042 ASSERT(is_int16(imm16)); 1043 instr_at_put(at_offset, (imm16 & kImm16Mask)); [all...] |
simulator-mips.cc | 2302 int16_t imm16 = instr->Imm16Value(); local [all...] |
/frameworks/compile/mclinker/lib/Target/ARM/ |
ARMRelocator.cpp | 258 // imm16: [19-16][11-0] 267 // imm16: [19-16][11-0] 277 // imm16: [19-16][26][14-12][7-0] 289 // imm16: [19-16][26][14-12][7-0]
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/external/elfutils/libcpu/defs/ |
i386 | 10 %mask {imm16} 16 169 11001000,{imm16},{imm8}:enter{W} {imm16},{imm8} 490 11000010,{imm16}:ret{W} {imm16} 492 11001010,{imm16}:lret {imm16} [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 372 Imm16 = 3 << ImmShift, 499 case X86II::Imm16: 517 case X86II::Imm16:
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/external/llvm/lib/Target/X86/ |
X86InstrFormats.td | 66 def Imm16 : ImmType<3>; 232 : X86Inst<o, f, Imm16, outs, ins, asm, itin> { 279 : X86Inst<o, f, Imm16, outs, ins, asm, itin> {
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/external/llvm/lib/Target/AArch64/Disassembler/ |
AArch64Disassembler.cpp | 406 unsigned Imm16 = FullImm & 0xffff; 411 Inst.addOperand(MCOperand::CreateImm(Imm16));
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/frameworks/rs/driver/linkloader/include/impl/ |
ELFObject.hxx | 324 // imm16: [19-16][26][14-12][7-0] 335 // imm16: [19-16][26][14-12][7-0]
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/external/llvm/lib/Target/X86/Disassembler/ |
X86DisassemblerDecoder.c | 1414 uint16_t imm16; local [all...] |
/external/llvm/lib/Target/ARM/ |
ARMCodeEmitter.cpp | 289 unsigned Imm16 = static_cast<unsigned>(MO.getImm()); 290 return Imm16; 756 // Encode imm16 as imm4:imm12 771 // Encode imm16 as imm4:imm1, same as movw above. [all...] |