| /external/llvm/lib/Target/R600/ |
| AMDGPUInstrInfo.cpp | 228 bool AMDGPUInstrInfo::isPredicable(MachineInstr *MI) const {
230 return MI->getDesc().isPredicable();
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| R600InstrInfo.h | 83 bool isPredicable(MachineInstr *MI) const;
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| AMDGPUInstrInfo.h | 122 bool isPredicable(MachineInstr *MI) const;
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| R600InstrInfo.cpp | 409 R600InstrInfo::isPredicable(MachineInstr *MI) const {
420 return AMDGPUInstrInfo::isPredicable(MI);
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| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.h | 140 bool isPredicable;
232 bool isPredicable;
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| CodeGenInstruction.cpp | 29 isPredicable = false;
94 isPredicable = true;
306 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable");
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| InstrInfoEmitter.cpp | 330 if (Inst.isPredicable) OS << "|(1<<MCID::Predicable)";
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| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 664 if (!NewMCID.isPredicable())
668 SkipPred = !NewMCID.isPredicable();
762 if (!NewMCID.isPredicable())
766 SkipPred = !NewMCID.isPredicable();
820 if (!MCID.isPredicable() && NewMCID.isPredicable())
[all...] |
| ARMBaseInstrInfo.h | 94 virtual bool isPredicable(MachineInstr *MI) const;
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| Thumb1RegisterInfo.cpp | 677 if (MI.isPredicable())
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| ARMBaseInstrInfo.cpp | 525 /// isPredicable - Return true if the specified instruction can be predicated.
528 bool ARMBaseInstrInfo::isPredicable(MachineInstr *MI) const {
529 if (!MI->isPredicable())
613 MI->getOperand(NumOps - (MI->isPredicable() ? 3 : 2));
[all...] |
| ARMConstantIslandPass.cpp | [all...] |
| ARMFastISel.cpp | 254 // If we're a thumb2 or not NEON function we were handled via isPredicable.
278 if (TII.isPredicable(MI) || isARMNEONPred(MI))
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfoV4.td | 487 let isPredicable = 1 in
599 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
639 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
677 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
717 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
755 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
793 let isPredicable = 1, neverHasSideEffects = 1, validSubTargets = HasV4SubT in
[all...] |
| HexagonInstrInfo.h | 114 virtual bool isPredicable(MachineInstr *MI) const;
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| HexagonInstrInfo.td | 120 let isPredicable = 1 in
167 isPredicable = 1 in
242 let isPredicable = 1 in
288 let isPredicable = 1 in
331 isMoveImm = 1, isPredicable = 1, isReMaterializable = 1 in
373 let isPredicable = 1 in
387 let isPredicable = 1 in {
450 let isPredicable = 1 in
455 let isPredicable = 1 in
461 let isPredicable = 1 i
[all...] |
| HexagonInstrInfoV5.td | 29 let isMoveImm = 1, isReMaterializable = 1, isPredicable = 1 in
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| HexagonInstrInfo.cpp | 916 bool HexagonInstrInfo::isPredicable(MachineInstr *MI) const {
917 bool isPred = MI->getDesc().isPredicable();
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 81 /// the predicate operand that controls an isPredicable() instruction.
279 bool isPredicable() const {
553 if (isPredicable()) {
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| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 164 if (!MI->isPredicable())
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| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 207 if (!MI->isPredicable())
221 if (!MI->isPredicable())
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| IfConversion.cpp | 626 /// in the block are isPredicable(). Also checks if the block contains any
707 if (!TII->isPredicable(I)) {
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 400 // isPredicable - Return true if this instruction has a predicate operand that
404 bool isPredicable(QueryType Type = AllInBundle) const {
[all...] |
| /external/llvm/docs/ |
| TableGenFundamentals.rst | 97 bit isPredicable = 0;
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