/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
syn_filt_opt.s | 36 STMFD r13!, {r4 - r12, r14} 54 LDRH r14, [r4], #2 63 STRH r14, [r5], #2 72 LDRH r14, [r4], #2 81 STRH r14, [r5], #2 89 LDR r14, =0xffff 94 AND r6, r6, r14 95 AND r9, r9, r14 105 AND r6, r6, r14 106 AND r9, r9, r14 [all...] |
Filt_6k_7k_opt.s | 35 STMFD r13!, {r4 - r12, r14} 50 MOV r14, #0 79 ADD r14, r14, #8 80 CMP r14, #80 86 @ not use registers: r4, r10, r12, r14, r5 101 SMULBB r14, r1, r0 @ (x[i] + x[i + 30]) * fir_7k[0] 103 SMLABT r14, r6, r0, r14 @ (x[i + 1] + x[i + 29]) * fir_7k[1] 112 SMLABB r14, r8, r0, r14 @ (x[i + 2] + x[i + 28]) * fir_7k[2 [all...] |
convolve_opt.s | 34 STMFD r13!, {r4 - r12, r14} 53 LDRSH r14, [r4], #-2 @ *tmpH-- 55 MLA r8, r12, r14, r8 59 LDRSH r14, [r4], #-2 @ *tmpH-- 62 MLA r8, r12, r14, r8 80 LDRSH r14, [r4], #-2 84 MLA r8, r12, r14, r8 92 LDRSH r14, [r4], #-2 @ *tmpH-- 94 MLA r8, r12, r14, r8 98 LDRSH r14, [r4], #-2 @ *tmpH- [all...] |
Deemph_32_opt.s | 36 STMFD r13!, {r4 - r12, r14} 55 MOV r14, r10, ASR #16 @y[0] = round(L_tmp) 60 STRH r14, [r2], #2 @update y[0] 62 MUL r9, r14, r8 66 MOV r14, r10, ASR #16 @y[1] = round(L_tmp) 71 STRH r14, [r2], #2 74 MUL r9, r14, r8 81 MOV r14, r10, ASR #16 85 STRH r14, [r2], #2 86 MUL r9, r14, r [all...] |
cor_h_vec_opt.s | 39 STMFD r13!, {r4 - r12, r14} 56 LDRSH r14, [r9] 59 MLA r6, r12, r14, r6 64 MLA r5, r12, r14, r5 65 MOV r14, #0x8000 67 ADD r10, r6, r14 68 ADD r9, r5, r14 76 MUL r14, r6, r11 78 MOV r6, r14, ASR #15 102 LDRSH r14, [r9 [all...] |
/external/tremolo/Tremolo/ |
bitwiseARM.s | 45 STMFD r13!,{r10,r11,r14} 54 RSB r14,r12,#32 @ r14= 32-bitsLeftInWord 57 MOV r10,r10,LSR r14 @ r10= ptr[0]>>(32-bitsLeftInWord) 59 RSB r14,r14,#32 @ r14= 32-bitsLeftInWord 60 ORRLT r10,r10,r11,LSL r14 @ r10= Next 32 bits. 61 MOV r14,#1 62 RSB r14,r14,r14,LSL r [all...] |
mdctARM.s | 54 STMFD r13!,{r4-r7,r14} 68 MOV r14,r12,ASR #15 69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 70 EORNE r12,r4, r14,ASR #31 73 MOV r14,r7, ASR #15 74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in rang [all...] |
mdctLARM.s | 54 STMFD r13!,{r4-r7,r14} 68 MOV r14,r12,ASR #15 69 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in range 70 EORNE r12,r4, r14,ASR #31 73 MOV r14,r7, ASR #15 74 TEQ r14,r14,ASR #31 @ if r14==0 || r14==-1 then in rang [all...] |
/external/oprofile/module/ia64/ |
IA64syscallstub.h | 39 addl r14=.post_fptr_##name - .L2_##name, r3; \ 41 ld8 r14=[r14]; \ 43 adds r14=8, r14; \ 45 ld8 gp=[r14]; \ 47 addl r14=@ltoff(old_sys_##name), gp; \ 50 ld8 r14=[r14]; \ 53 ld8 r14=[r14]; [all...] |
/external/openssl/crypto/sha/asm/ |
sha512-x86_64.S | 11 pushq %r14 41 movq %rax,%r14 47 rorq $5,%r14 53 xorq %rax,%r14 59 rorq $6,%r14 64 xorq %rax,%r14 72 rorq $28,%r14 79 addq %r14,%r11 83 movq %r11,%r14 89 rorq $5,%r14 [all...] |
sha1-armv4-large.S | 15 mov r14,sp 44 str r9,[r14,#-4]! 69 str r9,[r14,#-4]! 94 str r9,[r14,#-4]! 119 str r9,[r14,#-4]! 144 str r9,[r14,#-4]! 146 teq r14,sp 172 str r9,[r14,#-4]! 174 ldr r9,[r14,#15*4] 175 ldr r10,[r14,#13*4 [all...] |
/frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
band_nrg_v5.s | 44 mov r14, #0 56 qadd r14, r14, r7 60 qadd r14, r14, r8 63 qadd r14, r14, r7 65 qadd r14, r14, r8 69 qadd r14, r14, r1 [all...] |
Radix4FFT_v5.s | 35 mov r14, r0 @ xptr = buf@ 55 ldrd r0, [r14, #0] @ r0 = xptr[0]@ r1 = xptr[1]@ 56 add r14, r14, r9 @ xptr += step@ 58 ldrd r10, [r14, #0] @ r2 = xptr[0]@ r3 = xptr[1]@ 71 add r14, r14, r9 @ xptr += step@ 82 ldrd r10, [r14, #0] @ r4 = xptr[0]@ r5 = xptr[1]@ 91 add r14, r14, r9 @ xptr += step [all...] |
/hardware/samsung_slsi/exynos5/libswconverter/ |
csc_tiled_to_linear_uv_deinterleave_neon.s | 70 @r14 temp2 72 stmfd sp!, {r4-r12,r14} @ backup registers 97 mov r14, r3, asr #1 @ temp2 = width / 2 100 vst1.8 {d0}, [r7], r14 101 vst1.8 {d1}, [r7], r14 102 vst1.8 {d4}, [r7], r14 103 vst1.8 {d5}, [r7], r14 104 vst1.8 {d8}, [r7], r14 105 vst1.8 {d9}, [r7], r14 106 vst1.8 {d12}, [r7], r14 [all...] |
csc_interleave_memcpy_neon.s | 63 @r14 i 65 stmfd sp!, {r8-r12,r14} @ backup registers 70 mov r14, r3 72 cmp r14, #128 102 sub r14, #128 103 cmp r14, #128 107 cmp r14, #0 115 subs r14, #1
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/external/valgrind/main/none/tests/amd64/ |
redundantRexW.c | 109 "\tmovupd 0(%%r14), %%xmm0\n" \ 110 "\tmovupd 16(%%r14), %%xmm1\n" \ 111 "\tmovupd 32(%%r14), %%xmm2\n" \ 112 "\tmovupd 48(%%r14), %%xmm3\n" \ 113 "\tmovupd 64(%%r14), %%xmm4\n" \ 114 "\tmovupd 80(%%r14), %%xmm5\n" \ 115 "\tmovupd 96(%%r14), %%xmm6\n" \ 116 "\tmovupd 112(%%r14), %%xmm7\n" \ 117 "\tmovupd 128(%%r14), %%xmm8\n" \ 118 "\tmovupd 144(%%r14), %%xmm9\n" [all...] |
/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
Deemph_32_neon.s | 36 STMFD r13!, {r4 - r12, r14} 55 MOV r14, r10, ASR #16 @y[0] = round(L_tmp) 60 STRH r14, [r2], #2 @update y[0] 62 MUL r9, r14, r8 66 MOV r14, r10, ASR #16 @y[1] = round(L_tmp) 71 STRH r14, [r2], #2 74 MUL r9, r14, r8 81 MOV r14, r10, ASR #16 85 STRH r14, [r2], #2 86 MUL r9, r14, r [all...] |
cor_h_vec_neon.s | 39 STMFD r13!, {r4 - r12, r14} 57 LDRSH r14, [r9] 60 MLA r6, r12, r14, r6 65 MLA r5, r12, r14, r5 66 MOV r14, #0x8000 68 ADD r10, r6, r14 69 ADD r9, r5, r14 77 MUL r14, r6, r11 79 MOV r6, r14, ASR #15 103 LDRSH r14, [r9 [all...] |
/external/llvm/test/CodeGen/X86/ |
pr11468.ll | 8 ; force to push r14 on stack 9 call void asm sideeffect "nop", "~{r14},~{dirflag},~{fpsr},~{flags}"() nounwind, !srcloc !0 20 ; CHECK: pushq %r14 22 ; CHECK: .cfi_offset %r14, -24 28 ; CHECK: popq %r14
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/external/openssl/crypto/bn/asm/ |
armv4-mont.S | 44 mov r14,#0 45 umlal r12,r14,r6,r8 @ np[j]*n0 48 adc r12,r14,#0 54 mov r14,#0 56 adc r14,r14,#0 58 str r14,[r0,#4] @ tp[num]= 85 mov r14,#0 86 umlal r12,r14,r6,r8 @ np[j]*n0 91 adc r12,r14,# [all...] |
x86_64-mont5.S | 21 pushq %r14 62 xorq %r14,%r14 137 leaq 1(%r14),%r14 222 leaq 1(%r14),%r14 223 cmpq %r9,%r14 226 xorq %r14,%r14 [all...] |
x86_64-mont.S | 21 pushq %r14 38 xorq %r14,%r14 96 leaq 1(%r14),%r14 100 movq (%r12,%r14,8),%rbx 164 leaq 1(%r14),%r14 165 cmpq %r9,%r14 168 xorq %r14,%r1 [all...] |
/external/llvm/test/CodeGen/MSP430/ |
Inst16rr.ll | 7 ; CHECK: mov.w r14, r15 13 ; CHECK: add.w r14, r15 20 ; CHECK: and.w r14, r15 27 ; CHECK: bis.w r14, r15 34 ; CHECK: bic.w r14, r15 42 ; CHECK: xor.w r14, r15
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/external/openssl/crypto/ |
s390xcpuid.S | 16 br %r14 25 br %r14 38 br %r14 58 br %r14 73 bcr 8,%r14 78 br %r14 93 br %r14 97 brasl %r14,OPENSSL_cpuid_setup
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/bionic/libc/arch-arm/bionic/ |
setjmp.S | 53 stmfd sp!, {r0, r14} 59 ldmfd sp!, {r0, r14} 69 stmia r1, {r4-r14} 98 stmfd sp!, {r0, r1, r14} 105 ldmfd sp!, {r0, r1, r14} 118 ldmia r2, {r4-r14} 120 /* Validate sp and r14 */ 122 teqne r14, #0 132 mov r15, r14 134 mov r15, r14 [all...] |