| /external/bison/lib/ |
| bitset.h | 217 /* DST = SRC1 & SRC2. */
218 #define bitset_and(DST, SRC1, SRC2) BITSET_AND_ (DST, SRC1, SRC2)
220 /* DST = SRC1 & SRC2. Return non-zero if DST != SRC1 & SRC2. */
221 #define bitset_and_cmp(DST, SRC1, SRC2) BITSET_AND_CMP_ (DST, SRC1, SRC2)
223 /* DST = SRC1 & ~SRC2. */
224 #define bitset_andn(DST, SRC1, SRC2) BITSET_ANDN_ (DST, SRC1, SRC2)
[all...] |
| bbitset.h | 164 #define BITSET_CHECK3_(DST, SRC1, SRC2) \
166 || !BITSET_COMPATIBLE_ (DST, SRC2)) abort ();
168 #define BITSET_CHECK4_(DST, SRC1, SRC2, SRC3) \
169 if (!BITSET_COMPATIBLE_ (DST, SRC1) || !BITSET_COMPATIBLE_ (DST, SRC2) \
229 /* DST = SRC1 & SRC2. */
230 #define BITSET_AND_(DST, SRC1, SRC2) (SRC1)->b.vtable->and_ (DST, SRC1, SRC2)
231 #define BITSET_AND_CMP_(DST, SRC1, SRC2) (SRC1)->b.vtable->and_cmp (DST, SRC1, SRC2)
233 /* DST = SRC1 & ~SRC2. *
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonIntrinsics.td | 21 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
22 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
23 [(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
26 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s10Imm:$src2),
27 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
28 [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
31 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2),
32 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
33 [(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
36 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, u8Imm:$src2),
[all...] |
| HexagonIntrinsicsV4.td | 21 : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
22 !strconcat("$dst = ", !strconcat(opc , "($src1, ~$src2)")),
23 [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
26 : ALU32_rr<(outs DoubleRegs:$dst), (ins s8Imm:$src1, IntRegs:$src2),
27 !strconcat("$dst = ", !strconcat(opc , "(#$src1, $src2)")),
28 [(set DoubleRegs:$dst, (IntID imm:$src1, IntRegs:$src2))]>;
31 : ALU32_rr<(outs DoubleRegs:$dst), (ins IntRegs:$src1, s8Imm:$src2),
32 !strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
33 [(set DoubleRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
36 : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
[all...] |
| HexagonInstrInfoV5.td | 36 (ins PredRegs:$src1, f32imm:$src2),
37 "if ($src1) $dst = ##$src2",
43 (ins PredRegs:$src1, f32imm:$src2),
44 "if (!$src1) $dst = ##$src2",
99 (ins IntRegs:$src1, s11_2Imm:$src2, IntRegs:$src3),
100 "memw($src1+#$src2) = $src3",
102 (add IntRegs:$src1, s11_2ImmPred:$src2))]>,
114 (ins IntRegs:$src1, s11_3Imm:$src2, DoubleRegs:$src3),
115 "memd($src1+#$src2) = $src3",
117 (add IntRegs:$src1, s11_3ImmPred:$src2))]>,
[all...] |
| HexagonIntrinsicsV5.td | 63 : MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
64 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
65 [(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
68 : MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
69 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
70 [(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
73 : ALU64_rr<(outs PredRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
74 !strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
75 [(set PredRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
78 : ALU64_ri<(outs PredRegs:$dst), (ins DoubleRegs:$src1, u5Imm:$src2),
[all...] |
| /dalvik/tests/032-concrete-sub/ |
| expected.txt | 2 In AbstractBase.doStuff (src2)
|
| /external/llvm/lib/Target/X86/ |
| X86InstrXOP.td | 93 (ins VR128:$src1, VR128:$src2),
94 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
95 [(set VR128:$dst, (Int VR128:$src1, VR128:$src2))]>, VEX_4VOp3;
97 (ins VR128:$src1, i128mem:$src2),
98 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
100 (Int VR128:$src1, (bitconvert (memopv2i64 addr:$src2))))]>,
103 (ins i128mem:$src1, VR128:$src2),
104 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")
[all...] |
| X86InstrCMovSetCC.td | 21 : I<opc, MRMSrcReg, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
22 !strconcat(Mnemonic, "{w}\t{$src2, $dst|$dst, $src2}"),
24 (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))],
27 : I<opc, MRMSrcReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
28 !strconcat(Mnemonic, "{l}\t{$src2, $dst|$dst, $src2}"),
30 (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))],
33 :RI<opc, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
34 !strconcat(Mnemonic, "{q}\t{$src2, $dst|$dst, $src2}")
[all...] |
| X86InstrFMA.td | 25 (ins VR128:$src1, VR128:$src2, VR128:$src3),
27 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
28 [(set VR128:$dst, (OpVT128 (Op VR128:$src2,
33 (ins VR128:$src1, VR128:$src2, f128mem:$src3),
35 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
36 [(set VR128:$dst, (OpVT128 (Op VR128:$src2, VR128:$src1,
41 (ins VR256:$src1, VR256:$src2, VR256:$src3),
43 "\t{$src3, $src2, $dst|$dst, $src2, $src3}")
[all...] |
| /external/clang/test/SemaOpenCL/ |
| sampler_t_overload.cl | 8 void kernel ker(read_only image1d_t src1, read_only image2d_t src2) {
11 foo(smp, src2);
|
| /external/kernel-headers/original/linux/ |
| bitmap.h | 33 * bitmap_and(dst, src1, src2, nbits) *dst = *src1 & *src2
34 * bitmap_or(dst, src1, src2, nbits) *dst = *src1 | *src2
35 * bitmap_xor(dst, src1, src2, nbits) *dst = *src1 ^ *src2
36 * bitmap_andnot(dst, src1, src2, nbits) *dst = *src1 & ~(*src2)
38 * bitmap_equal(src1, src2, nbits) Are *src1 and *src2 equal
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel-shifter.ll | 11 define i32 @shl_reg(i32 %src1, i32 %src2) nounwind ssp {
15 %shl = shl i32 %src1, %src2
27 define i32 @lshr_reg(i32 %src1, i32 %src2) nounwind ssp {
31 %lshr = lshr i32 %src1, %src2
43 define i32 @ashr_reg(i32 %src1, i32 %src2) nounwind ssp {
47 %ashr = ashr i32 %src1, %src2
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.td | 125 def Select8 : Pseudo<(outs GR8:$dst), (ins GR8:$src, GR8:$src2, i8imm:$cc),
128 (MSP430selectcc GR8:$src, GR8:$src2, imm:$cc))]>;
129 def Select16 : Pseudo<(outs GR16:$dst), (ins GR16:$src, GR16:$src2, i8imm:$cc),
132 (MSP430selectcc GR16:$src, GR16:$src2, imm:$cc))]>;
345 (outs GR8:$dst), (ins GR8:$src, GR8:$src2),
346 "add.b\t{$src2, $dst}",
347 [(set GR8:$dst, (add GR8:$src, GR8:$src2)),
350 (outs GR16:$dst), (ins GR16:$src, GR16:$src2),
351 "add.w\t{$src2, $dst}",
352 [(set GR16:$dst, (add GR16:$src, GR16:$src2)),
[all...] |
| /development/ndk/platforms/android-3/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
| nodemask.h | 28 #define nodes_and(dst, src1, src2) __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES)
29 #define nodes_or(dst, src1, src2) __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES)
30 #define nodes_xor(dst, src1, src2) __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES)
31 #define nodes_andnot(dst, src1, src2) __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES)
33 #define nodes_equal(src1, src2) __nodes_equal(&(src1), &(src2), MAX_NUMNODES
[all...] |
| /prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
| nodemask.h | 28 #define nodes_and(dst, src1, src2) __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES)
29 #define nodes_or(dst, src1, src2) __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES)
30 #define nodes_xor(dst, src1, src2) __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES)
31 #define nodes_andnot(dst, src1, src2) __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES)
33 #define nodes_equal(src1, src2) __nodes_equal(&(src1), &(src2), MAX_NUMNODES
[all...] |
| /prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
| nodemask.h | 28 #define nodes_and(dst, src1, src2) __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES)
29 #define nodes_or(dst, src1, src2) __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES)
30 #define nodes_xor(dst, src1, src2) __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES)
31 #define nodes_andnot(dst, src1, src2) __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES)
33 #define nodes_equal(src1, src2) __nodes_equal(&(src1), &(src2), MAX_NUMNODES
[all...] |
| /prebuilts/ndk/4/platforms/android-5/arch-arm/usr/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
| nodemask.h | 28 #define nodes_and(dst, src1, src2) __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES)
29 #define nodes_or(dst, src1, src2) __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES)
30 #define nodes_xor(dst, src1, src2) __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES)
31 #define nodes_andnot(dst, src1, src2) __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES)
33 #define nodes_equal(src1, src2) __nodes_equal(&(src1), &(src2), MAX_NUMNODES
[all...] |
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
| nodemask.h | 28 #define nodes_and(dst, src1, src2) __nodes_and(&(dst), &(src1), &(src2), MAX_NUMNODES)
29 #define nodes_or(dst, src1, src2) __nodes_or(&(dst), &(src1), &(src2), MAX_NUMNODES)
30 #define nodes_xor(dst, src1, src2) __nodes_xor(&(dst), &(src1), &(src2), MAX_NUMNODES)
31 #define nodes_andnot(dst, src1, src2) __nodes_andnot(&(dst), &(src1), &(src2), MAX_NUMNODES)
33 #define nodes_equal(src1, src2) __nodes_equal(&(src1), &(src2), MAX_NUMNODES
[all...] |
| /prebuilts/ndk/4/platforms/android-8/arch-arm/usr/include/linux/ |
| cpumask.h | 27 #define cpus_and(dst, src1, src2) __cpus_and(&(dst), &(src1), &(src2), NR_CPUS)
28 #define cpus_or(dst, src1, src2) __cpus_or(&(dst), &(src1), &(src2), NR_CPUS)
29 #define cpus_xor(dst, src1, src2) __cpus_xor(&(dst), &(src1), &(src2), NR_CPUS)
30 #define cpus_andnot(dst, src1, src2) __cpus_andnot(&(dst), &(src1), &(src2), NR_CPUS)
32 #define cpus_equal(src1, src2) __cpus_equal(&(src1), &(src2), NR_CPUS
[all...] |
