Lines Matching refs:PhysicalReg
310 allRegs[k].physicalReg = (PhysicalReg) k;
323 allRegs[k].physicalReg = (PhysicalReg) k;
344 if(compileTable[k2].physicalReg == k) {
399 /* update compileTable.physicalReg, compileTable.spill_loc_index & allRegs.isUsed
401 not in a physical register (physicalReg is Null)
413 compileTable[k].physicalReg = PhysicalReg_Null;
419 if(compileTable[k].physicalReg == PhysicalReg_Null) {
421 compileTable[k].physicalReg
423 int tReg = compileTable[k].physicalReg;
434 compileTable[k].physicalReg = PhysicalReg_Null;
462 bool setToInMemory = (compileTable[k].physicalReg == PhysicalReg_Null);
528 currentBB->allocConstraints[ii].physicalReg = (PhysicalReg)ii;
2070 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2075 dumpPartToMem(compileTable[index].physicalReg, reg, false); //dump high of xmm to memory
2076 compileTable[index].physicalReg = PhysicalReg_Null;
2079 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2083 dumpPartToMem(compileTable[index].physicalReg, reg-1, true); //dump low of xmm to memory
2084 compileTable[index].physicalReg = PhysicalReg_Null;
2087 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2091 compileTable[index].physicalReg = PhysicalReg_Null;
2094 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2098 compileTable[index].physicalReg = PhysicalReg_Null;
2102 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2106 dumpPartToMem(compileTable[index].physicalReg, reg+1, false); //dump high of xmm to memory
2107 compileTable[index].physicalReg = PhysicalReg_Null;
2110 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2114 compileTable[index].physicalReg = PhysicalReg_Null;
2117 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2121 compileTable[index].physicalReg = PhysicalReg_Null;
2138 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2143 dumpPartToMem(compileTable[index].physicalReg, reg, false); //dump high of xmm to memory
2144 compileTable[index].physicalReg = PhysicalReg_Null;
2149 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2153 dumpPartToMem(compileTable[index].physicalReg, reg-1, true); //dump low of xmm to memory
2154 compileTable[index].physicalReg = PhysicalReg_Null;
2160 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2164 dumpPartToMem(compileTable[index].physicalReg, reg+1, false); //dump high of xmm to memory
2165 compileTable[index].physicalReg = PhysicalReg_Null;
2171 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2175 compileTable[index].physicalReg = PhysicalReg_Null;
2181 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2185 compileTable[index].physicalReg = PhysicalReg_Null;
2191 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2195 compileTable[index].physicalReg = PhysicalReg_Null;
2201 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2205 compileTable[index].physicalReg = PhysicalReg_Null;
2233 PhysicalReg regAll;
2245 PhysicalReg regAll = (PhysicalReg)checkVirtualReg(reg, LowOpndRegType_xmm, 0 /* do not update*/);
2258 regAll = (PhysicalReg)checkVirtualReg(reg, pType, 0 /* do not update*/);
2276 PhysicalReg spillForLogicalReg(int type, int reg, int indexToCompileTable);
2277 int unspillLogicalReg(int spill_index, int physicalReg);
2320 compileTable[tIndex].physicalReg = reg;
2325 compileTable[tIndex].physicalReg, reg, newType);
2330 if(compileTable[tIndex].physicalReg != PhysicalReg_Null) {
2332 ALOGI("already allocated to physical register %d", compileTable[tIndex].physicalReg);
2336 return compileTable[tIndex].physicalReg;
2345 compileTable[tIndex].physicalReg = allRegs[index].physicalReg;
2348 ALOGI("REGALLOC: register %d is free", allRegs[index].physicalReg);
2351 PhysicalReg allocR = spillForLogicalReg(newType, reg, tIndex);
2352 compileTable[tIndex].physicalReg = allocR;
2355 unspillLogicalReg(tIndex, compileTable[tIndex].physicalReg);
2361 compileTable[tIndex].physicalReg, reg, newType);
2363 return compileTable[tIndex].physicalReg;
2383 compileTable[index].physicalReg = srcReg;
2386 compileTable[index].physicalReg, reg, newType);
2398 //! 3> allRegs: whether a physical register is available, indexed by PhysicalReg
2439 int regCandidateT = currentBB->infoBasicBlock[index].allocConstraintsSorted[k].physicalReg;
2452 int regCandidateT = currentBB->allocConstraintsSorted[k].physicalReg;
2467 if(index1 >= 0) return currentBB->allocConstraintsSorted[index1].physicalReg;
2484 if(compileTable[index3].physicalReg == PhysicalReg_Null) {
2500 int regCandidateT = currentBB->infoBasicBlock[index2].allocConstraintsSorted[k].physicalReg;
2532 int regCandidateT = currentBB->allocConstraintsSorted[k].physicalReg;
2558 int regCandidateT = currentBB->allocConstraintsSorted[k].physicalReg;
2566 return currentBB->allocConstraintsSorted[index1].physicalReg;
2570 int regCandidateT = currentBB->allocConstraintsSorted[k].physicalReg;
2576 if(index1 >= 0) return currentBB->allocConstraintsSorted[index1].physicalReg;
2585 PhysicalReg spillForLogicalReg(int type, int reg, int indexToCompileTable) {
2587 //when a GG virtual register is spilled, write it to interpretd stack, set physicalReg to Null
2589 //when other types of VR is spilled, write it to interpreted stack, set physicalReg to Null
2590 //when a temporary (non-virtual) register is spilled, write it to stack, set physicalReg to Null
2593 PhysicalReg allocR;
2605 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2608 numOfUses[compileTable[k].physicalReg]++;
2619 compileTable[k].physicalReg != PhysicalReg_Null) {
2620 if(is8Bit && compileTable[k].physicalReg > PhysicalReg_EDX) continue; //not a candidate
2621 if(!canSpillReg[compileTable[k].physicalReg]) continue; //not a candidate
2623 numOfUses[compileTable[k].physicalReg] <= 1) {
2634 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2638 allocR = (PhysicalReg)spillLogicalReg(k, true);
2651 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2664 allocR = (PhysicalReg)spillLogicalReg(spill_index, true);
2674 (compileTable[k].physicalReg != PhysicalReg_Null) &&
2688 allocR = (PhysicalReg)spillLogicalReg(index, true);
2698 //!If updateTable is true, set physicalReg to Null;
2705 int physicalReg = compileTable[spill_index].physicalReg;
2706 if(!canSpillReg[physicalReg]) {
2708 ALOGW("can't spill register %d", physicalReg);
2716 compileTable[spill_index].physicalReg);
2726 compileTable[spill_index].physicalReg, 4*k);
2728 //compileTable[spill_index].physicalReg_prev = compileTable[spill_index].physicalReg;
2733 compileTable[spill_index].physicalReg);
2737 int allocR = compileTable[spill_index].physicalReg;
2738 compileTable[spill_index].physicalReg = PhysicalReg_Null;
2744 int unspillLogicalReg(int spill_index, int physicalReg) {
2750 physicalReg, true);
2754 physicalReg, compileTable[spill_index].spill_loc_index);
2785 if(isConst != 3 && compileTable[index].physicalReg != PhysicalReg_Null)
2800 compileTable[k].physicalReg == regNum &&
2823 void updateCurrentBBWithConstraints(PhysicalReg reg) {
2840 int regT = allocConstraints[jj].physicalReg;
2844 int regT2 = allocConstraintsSorted[ii].physicalReg;
2864 allocConstraintsSorted[num_sorted].physicalReg = (PhysicalReg)regT;
2878 ALOGI("%d: register %d has count %d", jj, allocConstraintsSorted[jj].physicalReg, allocConstraintsSorted[jj].count);
3630 //! set canSpillReg[physicalReg] to false
3633 void donotSpillReg(int physicalReg) {
3634 canSpillReg[physicalReg] = false;
3636 //! set canSpillReg[physicalReg] to true
3639 void doSpillReg(int physicalReg) {
3640 canSpillReg[physicalReg] = true;
3689 compileTable[tIndex].physicalReg = PhysicalReg_ECX;
3836 if(compileTable[k].physicalReg != PhysicalReg_Null &&
3856 if(compileTable[k].physicalReg == PhysicalReg_EBX &&
3866 if((compileTable[k].physicalReg == PhysicalReg_EBX ||
3867 compileTable[k].physicalReg == PhysicalReg_ESI) &&
3879 compileTable[indexForGlue].physicalReg == PhysicalReg_Null) {
4217 if(compileTable[k].refCount == 0 && compileTable[k].physicalReg != PhysicalReg_Null) {
4240 freeCrit will be true and physicalReg will be set to Null
4267 compileTable[k].physicalReg);
4271 compileTable[k].physicalReg);
4275 compileTable[k].physicalReg);
4292 spillLogicalReg(k, true); //will dump VR to memory & update physicalReg
4296 compileTable[k].physicalReg = PhysicalReg_Null;
4365 compileTable[index].physicalReg != PhysicalReg_Null) {
4389 compileTable[index].physicalReg = PhysicalReg_Null;
4408 if(index2 < 0 || compileTable[index2].physicalReg == PhysicalReg_Null) {
4413 ALOGI("physical register for GLUE %d set to %d", glue_reg, compileTable[index2].physicalReg);
4415 compileTable[index].physicalReg = compileTable[index2].physicalReg;
4432 if(compileTable[index].physicalReg != PhysicalReg_Null) {
4434 return compileTable[index].physicalReg;
4491 if(compileTable[index].physicalReg != PhysicalReg_Null) {
4495 if(compileTable[k].physicalReg == compileTable[index].physicalReg) {
4500 return compileTable[index].physicalReg;
4592 compileTable[k].physicalReg = PhysicalReg_Null;
4597 compileTable[k].gType == GLOBALTYPE_GG && compileTable[k].physicalReg != PhysicalReg_Null &&
4598 compileTable[k].physicalReg != compileTable[k].physicalReg_prev) {
4601 compileTable[k].regNum, compileTable[k].physicalType, compileTable[k].physicalReg);
4611 compileTable[k].physicalReg == PhysicalReg_Null && (!currentBB->endsWithReturn)) {
4616 compileTable[k].physicalReg = compileTable[k].physicalReg_prev;
4628 compileTable[indexForGlue].physicalReg == PhysicalReg_Null) {
4635 //!set its physicalReg to Null and update its reference count
4636 int nextVersionOfHardReg(PhysicalReg pReg, int refCount) {
4640 compileTable[indexT].physicalReg = PhysicalReg_Null;
4657 compileTable[num_compile_entries].physicalReg = PhysicalReg_Null;
4690 compileTable[index].physicalReg = PhysicalReg_Null;
4702 compileTable[num_compile_entries].physicalReg = PhysicalReg_Null;
4741 ALOGI("regNum %d physicalType %d refCount %d isConst %d physicalReg %d type %d",
4743 compileTable[jj].refCount, compileTable[jj].isConst, compileTable[jj].physicalReg, compileTable[jj].gType);
4806 stateTable1_1[k].physicalReg = compileTable[k].physicalReg;
4810 stateTable1_2[k].physicalReg = compileTable[k].physicalReg;
4814 stateTable1_3[k].physicalReg = compileTable[k].physicalReg;
4818 stateTable1_4[k].physicalReg = compileTable[k].physicalReg;
4824 compileTable[k].regNum, compileTable[k].physicalType, compileTable[k].physicalReg,
4862 compileTable[k].physicalReg = stateTable1_1[k].physicalReg;
4866 compileTable[k].physicalReg = stateTable1_2[k].physicalReg;
4870 compileTable[k].physicalReg = stateTable1_3[k].physicalReg;
4874 compileTable[k].physicalReg = stateTable1_4[k].physicalReg;
4911 int physicalReg;
4929 if(srcRegs[k].physicalReg == srcPhysical) { //increase num_dests
4945 srcRegs[num_src_regs].physicalReg = srcPhysical;
4960 if(dstReg == srcRegs[k].physicalReg) {
4977 stateTable1_1[k].physicalReg = PhysicalReg_Null;
4981 stateTable1_2[k].physicalReg = PhysicalReg_Null;
4985 stateTable1_3[k].physicalReg = PhysicalReg_Null;
4989 stateTable1_4[k].physicalReg = PhysicalReg_Null;
5006 compileTable[k].regNum, compileTable[k].physicalType, compileTable[k].physicalReg,
5023 if(compileTable[k].physicalReg == PhysicalReg_Null &&
5034 targetReg = stateTable1_1[k].physicalReg;
5038 targetReg = stateTable1_2[k].physicalReg;
5042 targetReg = stateTable1_3[k].physicalReg;
5046 targetReg = stateTable1_4[k].physicalReg;
5063 if(compileTable[k].physicalReg != targetReg &&
5067 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5076 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5079 insertSrcReg(compileTable[k].physicalReg, targetReg, targetSpill, k);
5082 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5085 insertSrcReg(compileTable[k].physicalReg, targetReg, targetSpill, k);
5089 if(compileTable[k].physicalReg != targetReg &&
5093 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5109 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5112 insertSrcReg(compileTable[k].physicalReg, targetReg, targetSpill, k);
5115 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5124 insertSrcReg(compileTable[k].physicalReg, targetReg, targetSpill, k);
5134 ALOGI("SRCREG %d: ", srcRegs[k].physicalReg);
5150 if(srcRegs[k].physicalReg == PhysicalReg_Null) {
5181 if(srcRegs[k].physicalReg == PhysicalReg_Null) {
5216 if(compileTable[k].physicalReg != targetReg && isVirtualReg(compileTable[k].physicalType)) {
5219 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5231 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5233 compileTable[k].physicalReg, true,
5236 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5238 compileTable[k].physicalReg);
5241 if(compileTable[k].physicalReg != targetReg && !isVirtualReg(compileTable[k].physicalType)) {
5243 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5248 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5249 move_reg_to_reg_noalloc(oSize, compileTable[k].physicalReg, true,
5253 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5254 saveToSpillRegion(oSize, compileTable[k].physicalReg, targetSpill);
5287 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5288 dumpToMem(targetReg, LowOpndRegType_xmm, compileTable[index].physicalReg);
5293 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5294 dumpToMem(targetReg-1, LowOpndRegType_xmm, compileTable[index].physicalReg);
5300 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5301 dumpToMem(targetReg, LowOpndRegType_gp, compileTable[index].physicalReg);
5307 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5308 dumpToMem(targetReg, LowOpndRegType_ss, compileTable[index].physicalReg);
