Home | History | Annotate | Download | only in x86

Lines Matching refs:PhysicalReg_Null

232 bool canSpillReg[PhysicalReg_Null]; //physical registers that should not be spilled
331 global data: RegisterInfo allRegs[PhysicalReg_Null]
413 compileTable[k].physicalReg = PhysicalReg_Null;
419 if(compileTable[k].physicalReg == PhysicalReg_Null) {
434 compileTable[k].physicalReg = PhysicalReg_Null;
462 bool setToInMemory = (compileTable[k].physicalReg == PhysicalReg_Null);
2070 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2076 compileTable[index].physicalReg = PhysicalReg_Null;
2079 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2084 compileTable[index].physicalReg = PhysicalReg_Null;
2087 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2091 compileTable[index].physicalReg = PhysicalReg_Null;
2094 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2098 compileTable[index].physicalReg = PhysicalReg_Null;
2102 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2107 compileTable[index].physicalReg = PhysicalReg_Null;
2110 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2114 compileTable[index].physicalReg = PhysicalReg_Null;
2117 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2121 compileTable[index].physicalReg = PhysicalReg_Null;
2138 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2144 compileTable[index].physicalReg = PhysicalReg_Null;
2149 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2154 compileTable[index].physicalReg = PhysicalReg_Null;
2160 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2165 compileTable[index].physicalReg = PhysicalReg_Null;
2171 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2175 compileTable[index].physicalReg = PhysicalReg_Null;
2181 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2185 compileTable[index].physicalReg = PhysicalReg_Null;
2191 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2195 compileTable[index].physicalReg = PhysicalReg_Null;
2201 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
2205 compileTable[index].physicalReg = PhysicalReg_Null;
2294 if(type & LowOpndRegType_virtual) return PhysicalReg_Null;
2296 return PhysicalReg_Null;
2300 reg == PhysicalReg_EBP || reg == PhysicalReg_Null))
2308 return PhysicalReg_Null;
2330 if(compileTable[tIndex].physicalReg != PhysicalReg_Null) {
2343 if(index >= 0 && index < PhysicalReg_Null) {
2440 assert(regCandidateT < PhysicalReg_Null);
2453 assert(regCandidateT < PhysicalReg_Null);
2484 if(compileTable[index3].physicalReg == PhysicalReg_Null) {
2507 assert(regCandidateT < PhysicalReg_Null);
2537 assert(regCandidateT < PhysicalReg_Null);
2559 assert(regCandidateT < PhysicalReg_Null);
2601 int numOfUses[PhysicalReg_Null];
2602 for(k = PhysicalReg_EAX; k < PhysicalReg_Null; k++)
2605 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2619 compileTable[k].physicalReg != PhysicalReg_Null) {
2634 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2651 if((compileTable[k].physicalReg != PhysicalReg_Null) &&
2674 (compileTable[k].physicalReg != PhysicalReg_Null) &&
2735 if(!updateTable) return PhysicalReg_Null;
2738 compileTable[spill_index].physicalReg = PhysicalReg_Null;
2762 return PhysicalReg_Null;
2785 if(isConst != 3 && compileTable[index].physicalReg != PhysicalReg_Null)
2841 assert(regT < PhysicalReg_Null);
2845 assert(regT2 < PhysicalReg_Null);
3614 for(k = 0; k < PhysicalReg_Null; k++) {
3625 for(k = 0; k < PhysicalReg_Null; k++) {
3836 if(compileTable[k].physicalReg != PhysicalReg_Null &&
3879 compileTable[indexForGlue].physicalReg == PhysicalReg_Null) {
4217 if(compileTable[k].refCount == 0 && compileTable[k].physicalReg != PhysicalReg_Null) {
4296 compileTable[k].physicalReg = PhysicalReg_Null;
4365 compileTable[index].physicalReg != PhysicalReg_Null) {
4389 compileTable[index].physicalReg = PhysicalReg_Null;
4408 if(index2 < 0 || compileTable[index2].physicalReg == PhysicalReg_Null) {
4425 if(currentBB == NULL) return PhysicalReg_Null;
4429 return PhysicalReg_Null;
4432 if(compileTable[index].physicalReg != PhysicalReg_Null) {
4437 return PhysicalReg_Null;
4475 if(currentBB == NULL) return PhysicalReg_Null;
4482 return PhysicalReg_Null;
4491 if(compileTable[index].physicalReg != PhysicalReg_Null) {
4496 return PhysicalReg_Null; //will allocate a register for VR
4510 return PhysicalReg_Null;
4592 compileTable[k].physicalReg = PhysicalReg_Null;
4597 compileTable[k].gType == GLOBALTYPE_GG && compileTable[k].physicalReg != PhysicalReg_Null &&
4611 compileTable[k].physicalReg == PhysicalReg_Null && (!currentBB->endsWithReturn)) {
4628 compileTable[indexForGlue].physicalReg == PhysicalReg_Null) {
4640 compileTable[indexT].physicalReg = PhysicalReg_Null;
4657 compileTable[num_compile_entries].physicalReg = PhysicalReg_Null;
4690 compileTable[index].physicalReg = PhysicalReg_Null;
4702 compileTable[num_compile_entries].physicalReg = PhysicalReg_Null;
4956 if(dstReg == PhysicalReg_Null) return false;
4977 stateTable1_1[k].physicalReg = PhysicalReg_Null;
4981 stateTable1_2[k].physicalReg = PhysicalReg_Null;
4985 stateTable1_3[k].physicalReg = PhysicalReg_Null;
4989 stateTable1_4[k].physicalReg = PhysicalReg_Null;
5023 if(compileTable[k].physicalReg == PhysicalReg_Null &&
5031 int targetReg = PhysicalReg_Null;
5067 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5069 insert a xfer order from PhysicalReg_Null to targetReg */
5070 insertSrcReg(PhysicalReg_Null, targetReg, targetSpill, k);
5076 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5082 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5093 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5105 insertSrcReg(PhysicalReg_Null, targetReg, targetSpill, k);
5109 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5115 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5150 if(srcRegs[k].physicalReg == PhysicalReg_Null) {
5181 if(srcRegs[k].physicalReg == PhysicalReg_Null) {
5219 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5231 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5236 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5243 if(compileTable[k].physicalReg == PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5248 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg != PhysicalReg_Null) {
5253 if(compileTable[k].physicalReg != PhysicalReg_Null && targetReg == PhysicalReg_Null) {
5287 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5293 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5300 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {
5307 if(index >= 0 && compileTable[index].physicalReg != PhysicalReg_Null) {