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Lines Matching full:get_virtual_reg

44     get_virtual_reg(vref, OpndSize_32, 1, false); //array
45 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
195 get_virtual_reg(vref, OpndSize_32, 1, false); //array
196 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
218 get_virtual_reg(vA, OpndSize_64, 1, false);
221 get_virtual_reg(vA, OpndSize_32, 4, false);
339 get_virtual_reg(vref, OpndSize_32, 1, false); //array
350 get_virtual_reg(vindex, OpndSize_32, 2, false); //index
361 get_virtual_reg(vA, OpndSize_32, 4, false);
463 get_virtual_reg(vB, OpndSize_32, 7, false);
501 get_virtual_reg(vA, OpndSize_32, 9, false);
507 get_virtual_reg(vA, OpndSize_64, 1, false);
706 get_virtual_reg(vA, OpndSize_32, 7, false);
714 get_virtual_reg(vA, OpndSize_64, 1, false);
846 get_virtual_reg(vB, OpndSize_32, 1, false);
867 get_virtual_reg(vB, OpndSize_32, 1, false);
897 get_virtual_reg(vB, OpndSize_32, 1, false);
901 get_virtual_reg(vA, OpndSize_32, 2, false);
927 get_virtual_reg(vB, OpndSize_32, 1, false);
931 get_virtual_reg(vA, OpndSize_64, 1, false);